source: mainline/kernel/arch/sparc64/include/mm/tsb.h@ f1d1f5d3

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since f1d1f5d3 was f1d1f5d3, checked in by Jakub Jermar <jakub@…>, 19 years ago

Fix bug in mm/as.c:

  • as_area_destroy() should not work with AS but as

sparc64 work:

  • start implementing TSB support
  • Property mode set to 100644
File size: 2.1 KB
Line 
1/*
2 * Copyright (C) 2006 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc64mm
30 * @{
31 */
32/** @file
33 */
34
35#ifndef KERN_sparc64_TSB_H_
36#define KERN_sparc64_TSB_H_
37
38#include <arch/mm/tte.h>
39#include <arch/types.h>
40#include <typedefs.h>
41
42/*
43 * ITSB abd DTSB will claim 64K of memory, which
44 * is a nice number considered that it is one of
45 * the page sizes supported by hardware, which,
46 * again, is nice because TSBs need to be locked
47 * in TLBs - only one TLB entry will do.
48 */
49#define ITSB_ENTRY_COUNT 2048
50#define DTSB_ENTRY_COUNT 2048
51
52struct tsb_entry {
53 tte_tag_t tag;
54 tte_data_t data;
55} __attribute__ ((packed));
56
57typedef struct tsb_entry tsb_entry_t;
58
59extern void tsb_invalidate(as_t *as, uintptr_t page, count_t pages);
60
61#endif
62
63/** @}
64 */
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