source: mainline/kernel/arch/sparc64/include/interrupt.h@ 454f1da

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 454f1da was 454f1da, checked in by Jakub Jermar <jakub@…>, 18 years ago

Reworked handling of illegal virtual aliases caused by frame reuse.
We moved the incomplete handling from backend's frame method to
backend's page_fault method. The page_fault method is the one that
can create an illegal alias if it writes the userspace frame using
kernel address with a different page color than the page to which is
this frame mapped in userspace. When we detect this, we do D-cache
shootdown on all processors (!!!).

If we add code that accesses userspace memory from kernel address
space, we will have to check for illegal virtual aliases at all such
places.

I tested this on a 4-way simulated E6500 and a real-world Ultra 5,
which has unfortunatelly only one processor.

This solves ticket #26.

  • Property mode set to 100644
File size: 2.2 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc64interrupt sparc64
30 * @ingroup interrupt
31 * @{
32 */
33/** @file
34 */
35
36#ifndef KERN_sparc64_INTERRUPT_H_
37#define KERN_sparc64_INTERRUPT_H_
38
39#include <arch/types.h>
40#include <arch/regdef.h>
41
42#define IVT_ITEMS 15
43#define IVT_FIRST 1
44
45/* This needs to be defined for inter-architecture API portability. */
46#define VECTOR_TLB_SHOOTDOWN_IPI 0
47
48enum {
49 IPI_TLB_SHOOTDOWN = VECTOR_TLB_SHOOTDOWN_IPI,
50 IPI_DCACHE_SHOOTDOWN
51};
52
53typedef struct {
54 uint64_t tnpc;
55 uint64_t tpc;
56 uint64_t tstate;
57} istate_t;
58
59static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
60{
61 istate->tpc = retaddr;
62}
63
64static inline int istate_from_uspace(istate_t *istate)
65{
66 return !(istate->tstate & TSTATE_PRIV_BIT);
67}
68
69static inline unative_t istate_get_pc(istate_t *istate)
70{
71 return istate->tpc;
72}
73
74#endif
75
76/** @}
77 */
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