source: mainline/kernel/arch/sparc64/include/cpu_family.h@ 66e08d02

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 66e08d02 was 6cd9aa6, checked in by Jakub Jermar <jakub@…>, 16 years ago

IRQ handlers are using one superfluous argument and an unused elipsis.
On the other hand, IRQ claim functions would need to be passed the instance
argument.

  • Property mode set to 100644
File size: 2.5 KB
Line 
1/*
2 * Copyright (c) 2008 Pavel Rimsky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc64
30 * @{
31 */
32/** @file
33 */
34
35#ifndef KERN_sparc64_CPU_FAMILY_H_
36#define KERN_sparc64_CPU_FAMILY_H_
37
38#include <arch.h>
39#include <cpu.h>
40#include <arch/register.h>
41#include <arch/asm.h>
42
43/**
44 * Find the processor (sub)family.
45 *
46 * @return true iff the CPU belongs to the US family
47 */
48static inline bool is_us(void)
49{
50 int impl = ((ver_reg_t) ver_read()).impl;
51 return (impl == IMPL_ULTRASPARCI) || (impl == IMPL_ULTRASPARCII) ||
52 (impl == IMPL_ULTRASPARCII_I) || (impl == IMPL_ULTRASPARCII_E);
53}
54
55/**
56 * Find the processor (sub)family.
57 *
58 * @return true iff the CPU belongs to the US-III subfamily
59 */
60static inline bool is_us_iii(void)
61{
62 int impl = ((ver_reg_t) ver_read()).impl;
63 return (impl == IMPL_ULTRASPARCIII) ||
64 (impl == IMPL_ULTRASPARCIII_PLUS) ||
65 (impl == IMPL_ULTRASPARCIII_I);
66}
67
68/**
69 * Find the processor (sub)family.
70 *
71 * @return true iff the CPU belongs to the US-IV subfamily
72 */
73static inline bool is_us_iv(void)
74{
75 int impl = ((ver_reg_t) ver_read()).impl;
76 return (impl == IMPL_ULTRASPARCIV) || (impl == IMPL_ULTRASPARCIV_PLUS);
77}
78
79#endif
80
81/** @}
82 */
83
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