[2a99fa8] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2005 Jakub Jermar
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[2a99fa8] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[1bb2e7a] | 29 | /** @addtogroup sparc64
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[ed166f7] | 35 | #ifndef KERN_sparc64_CPU_H_
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| 36 | #define KERN_sparc64_CPU_H_
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[2a99fa8] | 37 |
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[a9ac978] | 38 | #include <arch/types.h>
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[f4c2b6a] | 39 | #include <typedefs.h>
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[2cf87e50] | 40 | #include <arch/register.h>
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[b3f8fb7] | 41 | #include <arch/asm.h>
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[2cf87e50] | 42 |
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[454f1da] | 43 | #ifdef CONFIG_SMP
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| 44 | #include <arch/mm/cache.h>
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| 45 | #endif
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| 46 |
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[2cf87e50] | 47 | #define MANUF_FUJITSU 0x04
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| 48 | #define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */
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| 49 | #define MANUF_SUN 0x3e
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| 50 |
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| 51 | #define IMPL_ULTRASPARCI 0x10
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| 52 | #define IMPL_ULTRASPARCII 0x11
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| 53 | #define IMPL_ULTRASPARCII_I 0x12
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| 54 | #define IMPL_ULTRASPARCII_E 0x13
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| 55 | #define IMPL_ULTRASPARCIII 0x15
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| 56 | #define IMPL_ULTRASPARCIV_PLUS 0x19
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| 57 |
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| 58 | #define IMPL_SPARC64V 0x5
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[2a99fa8] | 59 |
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[f429331] | 60 | typedef struct {
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[454f1da] | 61 | uint32_t mid; /**< Processor ID as read from
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| 62 | UPA_CONFIG. */
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[2cf87e50] | 63 | ver_reg_t ver;
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[9a8baed] | 64 | uint32_t clock_frequency; /**< Processor frequency in Hz. */
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[2a0cda72] | 65 | uint64_t next_tick_cmpr; /**< Next clock interrupt should be
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[454f1da] | 66 | generated when the TICK register
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| 67 | matches this value. */
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[f429331] | 68 | } cpu_arch_t;
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[2a99fa8] | 69 |
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| 70 | #endif
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[b45c443] | 71 |
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[1bb2e7a] | 72 | /** @}
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[b45c443] | 73 | */
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