source: mainline/kernel/arch/sparc64/include/atomic.h@ 06e1e95

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 06e1e95 was 06e1e95, checked in by Jakub Jermar <jakub@…>, 19 years ago

C99 compliant header guards (hopefully) everywhere in the kernel.
Formatting and indentation changes.
Small improvements in sparc64.

  • Property mode set to 100644
File size: 2.6 KB
RevLine 
[2a99fa8]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[0ffa3ef5]29/** @addtogroup sparc64
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[ed166f7]35#ifndef KERN_sparc64_ATOMIC_H_
36#define KERN_sparc64_ATOMIC_H_
[2a99fa8]37
[59e07c91]38#include <arch/types.h>
[23684b7]39#include <typedefs.h>
[59e07c91]40
[0fad93a]41/** Atomic add operation.
42 *
43 * Use atomic compare and swap operation to atomically add signed value.
44 *
45 * @param val Atomic variable.
46 * @param i Signed value to be added.
47 *
48 * @return Value of the atomic variable as it existed before addition.
[2a99fa8]49 */
[23684b7]50static inline long atomic_add(atomic_t *val, int i)
[0fad93a]51{
[7f1c620]52 uint64_t a, b;
[0fad93a]53
[06e1e95]54 do {
55 volatile uintptr_t x = (uint64_t) &val->count;
56
57 a = *((uint64_t *) x);
58 b = a + i;
59 __asm__ volatile ("casx %0, %1, %2\n": "+m" (*((uint64_t *)x)), "+r" (a), "+r" (b));
60 } while (a != b);
[0fad93a]61
62 return a;
63}
[2a99fa8]64
[23684b7]65static inline long atomic_preinc(atomic_t *val)
[9a2d6e1]66{
67 return atomic_add(val, 1) + 1;
68}
69
[23684b7]70static inline long atomic_postinc(atomic_t *val)
[9a2d6e1]71{
72 return atomic_add(val, 1);
73}
74
[23684b7]75static inline long atomic_predec(atomic_t *val)
[9a2d6e1]76{
77 return atomic_add(val, -1) - 1;
78}
79
[23684b7]80static inline long atomic_postdec(atomic_t *val)
[9a2d6e1]81{
[8eb36b0]82 return atomic_add(val, -1);
[9a2d6e1]83}
84
[10c071e]85static inline void atomic_inc(atomic_t *val)
86{
[0fad93a]87 (void) atomic_add(val, 1);
[2a99fa8]88}
89
[10c071e]90static inline void atomic_dec(atomic_t *val)
91{
[0fad93a]92 (void) atomic_add(val, -1);
[2a99fa8]93}
94
95#endif
[b45c443]96
[0ffa3ef5]97/** @}
[b45c443]98 */
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