source: mainline/kernel/arch/sparc64/include/arch/istate_struct.ag@ d70ebffe

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d70ebffe was d70ebffe, checked in by Jakub Jermar <jakub@…>, 11 years ago

Let the fast MMU traps use exc_dispatch() in their slow-path.

In order to get proper exception accounting, the MMU related traps need
to go through the code in exc_dispatch(). To make this possible, we pass
the DTLB Tag Access register in istate_t in order to make way for the
trap type argument, which needs to be passed as the first argument to
exc_dispatch().

As a collateral change, this commit modifies the istate_t structure to
match the SPARC V9 ABI stack frame layout. It gives us a richer istate_t
with more information in it and also simplifies calculation of stack
offsets inside of preemptible_handler.

  • Property mode set to 100644
File size: 6.4 KB
Line 
1# Copyright (c) 2014 Jakub Jermar
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions
6# are met:
7#
8# - Redistributions of source code must retain the above copyright
9# notice, this list of conditions and the following disclaimer.
10# - Redistributions in binary form must reproduce the above copyright
11# notice, this list of conditions and the following disclaimer in the
12# documentation and/or other materials provided with the distribution.
13# - The name of the author may not be used to endorse or promote products
14# derived from this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27
28{
29 name : istate,
30
31 includes : [
32 {
33 guard : KERNEL,
34 include : <typedefs.h>
35 },
36 {
37 negative-guard : KERNEL,
38 include : <sys/types.h>
39 }
40 ],
41
42 members : [
43
44 #
45 # Window save area for locals and inputs. Required by ABI.
46 # Before using these, make sure that the corresponding register
47 # window has been spilled into memory, otherwise l0-l7 and
48 # i0-i7 will have undefined values.
49 #
50 {
51 name : l0,
52 type : uint64_t,
53 },
54 {
55 name : l1,
56 type : uint64_t,
57 },
58 {
59 name : l2,
60 type : uint64_t,
61 },
62 {
63 name : l3,
64 type : uint64_t,
65 },
66 {
67 name : l4,
68 type : uint64_t,
69 },
70 {
71 name : l5,
72 type : uint64_t,
73 },
74 {
75 name : l6,
76 type : uint64_t,
77 },
78 {
79 name : l7,
80 type : uint64_t,
81 },
82 {
83 name : i0,
84 type : uint64_t,
85 },
86 {
87 name : i1,
88 type : uint64_t,
89 },
90 {
91 name : i2,
92 type : uint64_t,
93 },
94 {
95 name : i3,
96 type : uint64_t,
97 },
98 {
99 name : i4,
100 type : uint64_t,
101 },
102 {
103 name : i5,
104 type : uint64_t,
105 },
106 {
107 name : i6,
108 type : uint64_t,
109 },
110 {
111 name : i7,
112 type : uint64_t,
113 },
114
115 #
116 # Six mandatory argument slots, required by the ABI, plus an
117 # optional argument slot for the 7th argument used by our
118 # syscalls. Since the preemptible handler is always passing
119 # integral arguments, undef_arg[0] - undef_arg[5] are always
120 # undefined.
121 #
122 {
123 name : undef_arg,
124 type : uint64_t,
125 elements : 6,
126 },
127 {
128 name : arg6,
129 type : uint64_t,
130 },
131
132 #
133 # From this point onwards, the istate layout is not dicated by
134 # the ABI. The only requirement is the stack alignment.
135 #
136
137 {
138 name : tnpc,
139 type : uint64_t
140 },
141 {
142 name : tpc,
143 type : uint64_t
144 },
145 {
146 name : tstate,
147 type : uint64_t
148 },
149 {
150 name : y,
151 type : uint64_t,
152 },
153
154 #
155 # At the moment, these are defined only when needed by the
156 # preemptible handler, so consider them undefined for now.
157 #
158 {
159 name : o0,
160 type : uint64_t,
161 },
162 {
163 name : o1,
164 type : uint64_t,
165 },
166 {
167 name : o2,
168 type : uint64_t,
169 },
170 {
171 name : o3,
172 type : uint64_t,
173 },
174 {
175 name : o4,
176 type : uint64_t,
177 },
178 {
179 name : o5,
180 type : uint64_t,
181 },
182 {
183 name : o6,
184 type : uint64_t,
185 },
186 {
187 name : o7,
188 type : uint64_t,
189 },
190
191 #
192 # I/DTLB Tag Access register or zero for non-MMU traps.
193 #
194 {
195 name : tlb_tag_access,
196 type : uint64_t
197 }
198 ]
199}
200
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