source: mainline/kernel/arch/sparc32/src/sparc32.c@ 58775d30

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 58775d30 was 6601f9b, checked in by Jakub Jermar <jakub@…>, 11 years ago

Provide a dummy implementation of sparc32 atomic_compare_exchange_4().

  • Property mode set to 100644
File size: 4.2 KB
Line 
1/*
2 * Copyright (c) 2010 Martin Decky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc32
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36#include <typedefs.h>
37#include <arch/interrupt.h>
38#include <arch/asm.h>
39#include <arch/barrier.h>
40#include <arch/machine_func.h>
41#include <func.h>
42#include <config.h>
43#include <errno.h>
44#include <context.h>
45#include <fpu_context.h>
46#include <interrupt.h>
47#include <syscall/copy.h>
48#include <ddi/irq.h>
49#include <proc/thread.h>
50#include <syscall/syscall.h>
51#include <console/console.h>
52#include <macros.h>
53#include <memstr.h>
54#include <str.h>
55
56char memcpy_from_uspace_failover_address;
57char memcpy_to_uspace_failover_address;
58
59static bootinfo_t machine_bootinfo;
60
61void arch_pre_main(void *unused, bootinfo_t *bootinfo)
62{
63 init.cnt = min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
64 memcpy(&machine_bootinfo, bootinfo, sizeof(machine_bootinfo));
65
66 for (size_t i = 0; i < init.cnt; i++) {
67 init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr);
68 init.tasks[i].size = bootinfo->tasks[i].size;
69 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
70 bootinfo->tasks[i].name);
71 }
72
73 machine_ops_init();
74}
75
76void arch_pre_mm_init(void)
77{
78}
79
80extern void func1(void);
81
82void arch_post_mm_init(void)
83{
84 machine_init(&machine_bootinfo);
85
86 if (config.cpu_active == 1) {
87 /* Initialize IRQ routing */
88 irq_init(16, 16);
89
90 /* Merge all memory zones to 1 big zone */
91 zone_merge_all();
92 }
93
94 machine_output_init();
95}
96
97
98void arch_post_cpu_init()
99{
100}
101
102void arch_pre_smp_init(void)
103{
104}
105
106void arch_post_smp_init(void)
107{
108 machine_input_init();
109}
110
111void calibrate_delay_loop(void)
112{
113}
114
115sysarg_t sys_tls_set(uintptr_t addr)
116{
117 return EOK;
118}
119
120/** Construct function pointer
121 *
122 * @param fptr function pointer structure
123 * @param addr function address
124 * @param caller calling function address
125 *
126 * @return address of the function pointer
127 *
128 */
129void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
130{
131 return addr;
132}
133
134void arch_reboot(void)
135{
136}
137
138void irq_initialize_arch(irq_t *irq)
139{
140 (void) irq;
141}
142
143void istate_decode(istate_t *istate)
144{
145 (void) istate;
146}
147
148void fpu_init(void)
149{
150}
151
152void fpu_context_save(fpu_context_t *ctx)
153{
154}
155
156void fpu_context_restore(fpu_context_t *ctx)
157{
158}
159
160int memcpy_from_uspace(void *dst, const void *uspace_src, size_t size)
161{
162 memcpy(dst, uspace_src, size);
163 return 1;
164}
165
166int memcpy_to_uspace(void *uspace_dst, const void *src, size_t size)
167{
168 memcpy(uspace_dst, src, size);
169 return 1;
170}
171
172bool __atomic_compare_exchange_4(uint32_t *ptr, uint32_t *expected,
173 uint32_t desired, bool weak, int success_mm, int failure_mm)
174{
175 ipl_t ipl;
176 bool success;
177
178 /* XXX: This is a rather dummy implementation. */
179
180 ipl = interrupts_disable();
181 memory_barrier();
182 if (*ptr == *expected) {
183 success = true;
184 *ptr = desired;
185 } else {
186 success = false;
187 *expected = *ptr;
188 }
189 memory_barrier();
190 interrupts_restore(ipl);
191
192 return success;
193}
194
195/** @}
196 */
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