1 | /*
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2 | * Copyright (c) 2010 Martin Decky
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup sparc32
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30 | * @{
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31 | */
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32 | /** @file
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33 | */
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34 |
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35 | #include <arch.h>
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36 | #include <arch/arch.h>
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37 | #include <typedefs.h>
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38 | #include <arch/interrupt.h>
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39 | #include <arch/asm.h>
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40 | #include <arch/barrier.h>
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41 | #include <arch/machine_func.h>
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42 | #include <func.h>
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43 | #include <config.h>
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44 | #include <errno.h>
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45 | #include <context.h>
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46 | #include <fpu_context.h>
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47 | #include <interrupt.h>
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48 | #include <syscall/copy.h>
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49 | #include <ddi/irq.h>
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50 | #include <proc/thread.h>
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51 | #include <syscall/syscall.h>
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52 | #include <console/console.h>
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53 | #include <macros.h>
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54 | #include <memstr.h>
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55 | #include <str.h>
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56 |
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57 | static void sparc32_post_mm_init(void);
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58 | static void sparc32_post_smp_init(void);
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59 |
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60 | arch_ops_t sparc32_ops = {
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61 | .post_mm_init = sparc32_post_mm_init,
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62 | .post_smp_init = sparc32_post_smp_init,
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63 | };
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64 |
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65 | arch_ops_t *arch_ops = &sparc32_ops;
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66 |
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67 | char memcpy_from_uspace_failover_address;
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68 | char memcpy_to_uspace_failover_address;
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69 |
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70 | static bootinfo_t machine_bootinfo;
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71 |
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72 | void sparc32_pre_main(void *unused, bootinfo_t *bootinfo)
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73 | {
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74 | init.cnt = min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
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75 | memcpy(&machine_bootinfo, bootinfo, sizeof(machine_bootinfo));
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76 |
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77 | for (size_t i = 0; i < init.cnt; i++) {
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78 | init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr);
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79 | init.tasks[i].size = bootinfo->tasks[i].size;
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80 | str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
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81 | bootinfo->tasks[i].name);
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82 | }
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83 |
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84 | machine_ops_init();
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85 | }
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86 |
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87 | void sparc32_post_mm_init(void)
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88 | {
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89 | machine_init(&machine_bootinfo);
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90 |
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91 | if (config.cpu_active == 1) {
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92 | /* Initialize IRQ routing */
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93 | irq_init(16, 16);
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94 |
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95 | /* Merge all memory zones to 1 big zone */
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96 | zone_merge_all();
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97 | }
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98 |
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99 | machine_output_init();
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100 | }
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101 |
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102 | void sparc32_post_smp_init(void)
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103 | {
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104 | machine_input_init();
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105 | }
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106 |
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107 | void calibrate_delay_loop(void)
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108 | {
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109 | }
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110 |
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111 | /** Construct function pointer
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112 | *
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113 | * @param fptr function pointer structure
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114 | * @param addr function address
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115 | * @param caller calling function address
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116 | *
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117 | * @return address of the function pointer
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118 | *
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119 | */
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120 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
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121 | {
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122 | return addr;
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123 | }
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124 |
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125 | void arch_reboot(void)
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126 | {
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127 | }
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128 |
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129 | void irq_initialize_arch(irq_t *irq)
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130 | {
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131 | (void) irq;
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132 | }
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133 |
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134 | void istate_decode(istate_t *istate)
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135 | {
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136 | (void) istate;
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137 | }
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138 |
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139 | void fpu_init(void)
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140 | {
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141 | }
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142 |
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143 | void fpu_context_save(fpu_context_t *ctx)
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144 | {
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145 | }
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146 |
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147 | void fpu_context_restore(fpu_context_t *ctx)
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148 | {
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149 | }
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150 |
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151 | int memcpy_from_uspace(void *dst, const void *uspace_src, size_t size)
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152 | {
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153 | memcpy(dst, uspace_src, size);
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154 | return 1;
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155 | }
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156 |
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157 | int memcpy_to_uspace(void *uspace_dst, const void *src, size_t size)
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158 | {
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159 | memcpy(uspace_dst, src, size);
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160 | return 1;
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161 | }
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162 |
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163 | bool __atomic_compare_exchange_4(uint32_t *ptr, uint32_t *expected,
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164 | uint32_t desired, bool weak, int success_mm, int failure_mm)
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165 | {
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166 | ipl_t ipl;
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167 | bool success;
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168 |
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169 | /* XXX: This is a rather dummy implementation. */
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170 |
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171 | ipl = interrupts_disable();
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172 | memory_barrier();
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173 | if (*ptr == *expected) {
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174 | success = true;
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175 | *ptr = desired;
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176 | } else {
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177 | success = false;
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178 | *expected = *ptr;
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179 | }
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180 | memory_barrier();
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181 | interrupts_restore(ipl);
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182 |
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183 | return success;
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184 | }
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185 |
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186 | /** @}
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187 | */
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