source: mainline/kernel/arch/sparc32/src/sparc32.c@ 36df4109

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 36df4109 was 36df4109, checked in by Jakub Jermar <jakub@…>, 9 years ago

Introduce architecure-specific operations

This replaces the arch_*_init() functions with an arch_ops_t structure
defined for each architecture. Undefined operations are treated as NOPs.

  • Property mode set to 100644
File size: 4.3 KB
Line 
1/*
2 * Copyright (c) 2010 Martin Decky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup sparc32
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36#include <arch/arch.h>
37#include <typedefs.h>
38#include <arch/interrupt.h>
39#include <arch/asm.h>
40#include <arch/barrier.h>
41#include <arch/machine_func.h>
42#include <func.h>
43#include <config.h>
44#include <errno.h>
45#include <context.h>
46#include <fpu_context.h>
47#include <interrupt.h>
48#include <syscall/copy.h>
49#include <ddi/irq.h>
50#include <proc/thread.h>
51#include <syscall/syscall.h>
52#include <console/console.h>
53#include <macros.h>
54#include <memstr.h>
55#include <str.h>
56
57static void sparc32_post_mm_init(void);
58static void sparc32_post_smp_init(void);
59
60arch_ops_t sparc32_ops = {
61 .post_mm_init = sparc32_post_mm_init,
62 .post_smp_init = sparc32_post_smp_init,
63};
64
65arch_ops_t *arch_ops = &sparc32_ops;
66
67char memcpy_from_uspace_failover_address;
68char memcpy_to_uspace_failover_address;
69
70static bootinfo_t machine_bootinfo;
71
72void sparc32_pre_main(void *unused, bootinfo_t *bootinfo)
73{
74 init.cnt = min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
75 memcpy(&machine_bootinfo, bootinfo, sizeof(machine_bootinfo));
76
77 for (size_t i = 0; i < init.cnt; i++) {
78 init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr);
79 init.tasks[i].size = bootinfo->tasks[i].size;
80 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
81 bootinfo->tasks[i].name);
82 }
83
84 machine_ops_init();
85}
86
87void sparc32_post_mm_init(void)
88{
89 machine_init(&machine_bootinfo);
90
91 if (config.cpu_active == 1) {
92 /* Initialize IRQ routing */
93 irq_init(16, 16);
94
95 /* Merge all memory zones to 1 big zone */
96 zone_merge_all();
97 }
98
99 machine_output_init();
100}
101
102void sparc32_post_smp_init(void)
103{
104 machine_input_init();
105}
106
107void calibrate_delay_loop(void)
108{
109}
110
111/** Construct function pointer
112 *
113 * @param fptr function pointer structure
114 * @param addr function address
115 * @param caller calling function address
116 *
117 * @return address of the function pointer
118 *
119 */
120void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
121{
122 return addr;
123}
124
125void arch_reboot(void)
126{
127}
128
129void irq_initialize_arch(irq_t *irq)
130{
131 (void) irq;
132}
133
134void istate_decode(istate_t *istate)
135{
136 (void) istate;
137}
138
139void fpu_init(void)
140{
141}
142
143void fpu_context_save(fpu_context_t *ctx)
144{
145}
146
147void fpu_context_restore(fpu_context_t *ctx)
148{
149}
150
151int memcpy_from_uspace(void *dst, const void *uspace_src, size_t size)
152{
153 memcpy(dst, uspace_src, size);
154 return 1;
155}
156
157int memcpy_to_uspace(void *uspace_dst, const void *src, size_t size)
158{
159 memcpy(uspace_dst, src, size);
160 return 1;
161}
162
163bool __atomic_compare_exchange_4(uint32_t *ptr, uint32_t *expected,
164 uint32_t desired, bool weak, int success_mm, int failure_mm)
165{
166 ipl_t ipl;
167 bool success;
168
169 /* XXX: This is a rather dummy implementation. */
170
171 ipl = interrupts_disable();
172 memory_barrier();
173 if (*ptr == *expected) {
174 success = true;
175 *ptr = desired;
176 } else {
177 success = false;
178 *expected = *ptr;
179 }
180 memory_barrier();
181 interrupts_restore(ipl);
182
183 return success;
184}
185
186/** @}
187 */
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