| 1 | /*
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| 2 | * Copyright (c) 2005 Jakub Jermar
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| 3 | * Copyright (c) 2013 Jakub Klama
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| 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 |
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| 30 | /** @addtogroup sparc64interrupt
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| 31 | * @{
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| 32 | */
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| 33 | /**
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| 34 | * @file
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| 35 | */
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| 36 |
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| 37 | #ifndef KERN_sparc32_EXCEPTION_H_
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| 38 | #define KERN_sparc32_EXCEPTION_H_
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| 39 |
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| 40 | #define TT_INSTRUCTION_ACCESS_EXCEPTION 0x01
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| 41 | #define TT_INSTRUCTION_ACCESS_MMU_MISS 0x3c
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| 42 | #define TT_INSTRUCTION_ACCESS_ERROR 0x21
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| 43 | #define TT_ILLEGAL_INSTRUCTION 0x02
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| 44 | #define TT_PRIVILEGED_INSTRUCTION 0x03
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| 45 | #define TT_FP_DISABLED 0x08
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| 46 | #define TT_DIVISION_BY_ZERO 0x2a
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| 47 | #define TT_DATA_ACCESS_EXCEPTION 0x09
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| 48 | #define TT_DATA_ACCESS_MMU_MISS 0x2c
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| 49 | #define TT_DATA_ACCESS_ERROR 0x29
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| 50 | #define TT_MEM_ADDRESS_NOT_ALIGNED 0x07
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| 51 |
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| 52 | #ifndef __ASM__
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| 53 |
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| 54 | /*#include <arch/interrupt.h>*/
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| 55 |
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| 56 | extern void instruction_access_exception(int n, istate_t *istate);
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| 57 | extern void instruction_access_error(int n, istate_t *istate);
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| 58 | extern void illegal_instruction(int n, istate_t *istate);
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| 59 | extern void privileged_instruction(int n, istate_t *istate);
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| 60 | extern void fp_disabled(int n, istate_t *istate);
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| 61 | extern void division_by_zero(int n, istate_t *istate);
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| 62 | extern void data_access_exception(int n, istate_t *istate);
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| 63 | extern void data_access_error(int n, istate_t *istate);
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| 64 | extern void mem_address_not_aligned(int n, istate_t *istate);
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| 65 |
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| 66 | #endif /* !__ASM__ */
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| 67 |
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| 68 | #endif
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| 69 |
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| 70 | /** @}
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| 71 | */
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