source: mainline/kernel/arch/riscv64/src/mm/page.c@ 295ee02

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 295ee02 was 295ee02, checked in by Martin Decky <martin@…>, 8 years ago

riscv64: disable interrupts when halting the CPU
move all CPU-related control constants to arch/cpu.h

  • Property mode set to 100644
File size: 2.8 KB
Line 
1/*
2 * Copyright (c) 2016 Martin Decky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup riscv64mm
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/mm/page.h>
36#include <genarch/mm/page_pt.h>
37#include <arch/mm/frame.h>
38#include <arch/cpu.h>
39#include <mm/frame.h>
40#include <mm/page.h>
41#include <mm/as.h>
42#include <align.h>
43#include <config.h>
44#include <func.h>
45#include <arch/interrupt.h>
46#include <arch/asm.h>
47#include <debug.h>
48#include <print.h>
49#include <interrupt.h>
50
51void page_arch_init(void)
52{
53 if (config.cpu_active == 1) {
54 page_mapping_operations = &pt_mapping_operations;
55
56 page_table_lock(AS_KERNEL, true);
57
58 /*
59 * PA2KA(identity) mapping for all low-memory frames.
60 */
61 for (uintptr_t cur = 0;
62 cur < min(config.identity_size, config.physmem_end);
63 cur += FRAME_SIZE)
64 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur,
65 PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_EXEC | PAGE_WRITE | PAGE_READ);
66
67 page_table_unlock(AS_KERNEL, true);
68
69 // FIXME: register page fault extension handler
70
71 write_satp((uintptr_t) AS_KERNEL->genarch.page_table);
72
73 /* The boot page table is no longer needed. */
74 // FIXME: frame_mark_available(pt_frame, 1);
75 }
76}
77
78void page_fault(unsigned int n __attribute__((unused)), istate_t *istate)
79{
80}
81
82void write_satp(uintptr_t ptl0)
83{
84 uint64_t satp = ((ptl0 >> FRAME_WIDTH) & SATP_PFN_MASK) |
85 SATP_MODE_SV48;
86
87 asm volatile (
88 "csrw sptbr, %[satp]\n"
89 :: [satp] "r" (satp)
90 );
91}
92
93/** @}
94 */
Note: See TracBrowser for help on using the repository browser.