source: mainline/kernel/arch/ppc64/include/byteorder.h@ 06e1e95

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 06e1e95 was 06e1e95, checked in by Jakub Jermar <jakub@…>, 19 years ago

C99 compliant header guards (hopefully) everywhere in the kernel.
Formatting and indentation changes.
Small improvements in sparc64.

  • Property mode set to 100644
File size: 2.1 KB
RevLine 
[602c9101]1/*
2 * Copyright (C) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup ppc64
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[06e1e95]35#ifndef KERN_ppc64_BYTEORDER_H_
36#define KERN_ppc64_BYTEORDER_H_
[602c9101]37
38#include <arch/types.h>
39#include <byteorder.h>
40
[31282f9]41#define BIG_ENDIAN
42
[7f1c620]43static inline uint64_t uint64_t_le2host(uint64_t n)
[602c9101]44{
[7f1c620]45 return uint64_t_byteorder_swap(n);
[602c9101]46}
47
48
[7f1c620]49/** Convert little-endian unative_t to host unative_t
[602c9101]50 *
[7f1c620]51 * Convert little-endian unative_t parameter to host endianess.
[602c9101]52 *
[7f1c620]53 * @param n Little-endian unative_t argument.
[602c9101]54 *
55 * @return Result in host endianess.
56 *
57 */
[7f1c620]58static inline unative_t unative_t_le2host(unative_t n)
[602c9101]59{
[7f1c620]60 uintptr_t v;
[602c9101]61
[48c1ef9]62 asm volatile (
63 "lwbrx %0, %1, %2\n"
64 : "=r" (v)
65 : "i" (0), "r" (&n)
66 );
[602c9101]67 return v;
68}
[48c1ef9]69
[602c9101]70#endif
[b45c443]71
[06e1e95]72/** @}
[b45c443]73 */
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