1 | /*
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2 | * Copyright (c) 2005 Martin Decky
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup ppc32
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30 | * @{
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31 | */
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32 | /** @file
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33 | */
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34 |
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35 | #include <arch.h>
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36 | #include <arch/arch.h>
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37 | #include <config.h>
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38 | #include <arch/boot/boot.h>
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39 | #include <genarch/drivers/via-cuda/cuda.h>
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40 | #include <genarch/kbrd/kbrd.h>
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41 | #include <arch/interrupt.h>
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42 | #include <interrupt.h>
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43 | #include <genarch/fb/fb.h>
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44 | #include <abi/fb/visuals.h>
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45 | #include <genarch/ofw/ofw_tree.h>
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46 | #include <genarch/ofw/pci.h>
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47 | #include <userspace.h>
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48 | #include <mm/page.h>
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49 | #include <mm/km.h>
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50 | #include <time/clock.h>
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51 | #include <abi/proc/uarg.h>
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52 | #include <console/console.h>
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53 | #include <sysinfo/sysinfo.h>
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54 | #include <ddi/irq.h>
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55 | #include <arch/drivers/pic.h>
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56 | #include <align.h>
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57 | #include <macros.h>
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58 | #include <str.h>
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59 | #include <print.h>
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60 |
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61 | #define IRQ_COUNT 64
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62 | #define IRQ_CUDA 10
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63 |
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64 | static void ppc32_pre_mm_init(void);
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65 | static void ppc32_post_mm_init(void);
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66 | static void ppc32_post_smp_init(void);
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67 |
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68 | arch_ops_t ppc32_ops = {
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69 | .pre_mm_init = ppc32_pre_mm_init,
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70 | .post_mm_init = ppc32_post_mm_init,
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71 | .post_smp_init = ppc32_post_smp_init,
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72 | };
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73 |
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74 | arch_ops_t *arch_ops = &ppc32_ops;
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75 |
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76 | bootinfo_t bootinfo;
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77 |
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78 | static cir_t pic_cir;
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79 | static void *pic_cir_arg;
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80 |
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81 | /** Performs ppc32-specific initialization before main_bsp() is called. */
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82 | void ppc32_pre_main(bootinfo_t *bootinfo)
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83 | {
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84 | /* Copy tasks map. */
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85 | init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
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86 | size_t i;
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87 | for (i = 0; i < init.cnt; i++) {
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88 | init.tasks[i].paddr = KA2PA(bootinfo->taskmap.tasks[i].addr);
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89 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
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90 | str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
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91 | bootinfo->taskmap.tasks[i].name);
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92 | }
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93 |
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94 | /* Copy physical memory map. */
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95 | memmap.total = bootinfo->memmap.total;
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96 | memmap.cnt = min(bootinfo->memmap.cnt, MEMMAP_MAX_RECORDS);
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97 | for (i = 0; i < memmap.cnt; i++) {
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98 | memmap.zones[i].start = bootinfo->memmap.zones[i].start;
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99 | memmap.zones[i].size = bootinfo->memmap.zones[i].size;
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100 | }
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101 |
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102 | /* Copy boot allocations info. */
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103 | ballocs.base = bootinfo->ballocs.base;
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104 | ballocs.size = bootinfo->ballocs.size;
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105 |
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106 | /* Copy OFW tree. */
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107 | ofw_tree_init(bootinfo->ofw_root);
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108 | }
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109 |
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110 | void ppc32_pre_mm_init(void)
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111 | {
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112 | /* Initialize dispatch table */
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113 | interrupt_init();
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114 |
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115 | ofw_tree_node_t *cpus_node;
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116 | ofw_tree_node_t *cpu_node;
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117 | ofw_tree_property_t *freq_prop;
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118 |
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119 | cpus_node = ofw_tree_lookup("/cpus");
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120 | if (!cpus_node)
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121 | panic("Could not find cpus node.");
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122 |
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123 | cpu_node = cpus_node->child;
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124 | if (!cpu_node)
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125 | panic("Could not find first cpu.");
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126 |
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127 | freq_prop = ofw_tree_getprop(cpu_node, "timebase-frequency");
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128 | if (!freq_prop)
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129 | panic("Could not get frequency property.");
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130 |
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131 | uint32_t freq;
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132 | freq = *((uint32_t *) freq_prop->value);
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133 |
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134 | /* Start decrementer */
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135 | decrementer_start(freq / HZ);
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136 | }
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137 |
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138 | #ifdef CONFIG_FB
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139 | static bool display_register(ofw_tree_node_t *node, void *arg)
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140 | {
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141 | uintptr_t fb_addr = 0;
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142 | uint32_t fb_width = 0;
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143 | uint32_t fb_height = 0;
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144 | uint32_t fb_scanline = 0;
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145 | unsigned int visual = VISUAL_UNKNOWN;
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146 |
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147 | ofw_tree_property_t *prop = ofw_tree_getprop(node, "address");
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148 | if ((prop) && (prop->value))
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149 | fb_addr = *((uintptr_t *) prop->value);
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150 |
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151 | prop = ofw_tree_getprop(node, "width");
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152 | if ((prop) && (prop->value))
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153 | fb_width = *((uint32_t *) prop->value);
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154 |
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155 | prop = ofw_tree_getprop(node, "height");
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156 | if ((prop) && (prop->value))
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157 | fb_height = *((uint32_t *) prop->value);
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158 |
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159 | prop = ofw_tree_getprop(node, "depth");
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160 | if ((prop) && (prop->value)) {
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161 | uint32_t fb_bpp = *((uint32_t *) prop->value);
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162 | switch (fb_bpp) {
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163 | case 8:
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164 | visual = VISUAL_INDIRECT_8;
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165 | break;
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166 | case 15:
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167 | visual = VISUAL_RGB_5_5_5_BE;
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168 | break;
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169 | case 16:
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170 | visual = VISUAL_RGB_5_6_5_BE;
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171 | break;
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172 | case 24:
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173 | visual = VISUAL_BGR_8_8_8;
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174 | break;
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175 | case 32:
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176 | visual = VISUAL_RGB_0_8_8_8;
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177 | break;
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178 | default:
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179 | visual = VISUAL_UNKNOWN;
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180 | }
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181 | }
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182 |
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183 | prop = ofw_tree_getprop(node, "linebytes");
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184 | if ((prop) && (prop->value))
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185 | fb_scanline = *((uint32_t *) prop->value);
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186 |
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187 | if ((fb_addr) && (fb_width > 0) && (fb_height > 0)
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188 | && (fb_scanline > 0) && (visual != VISUAL_UNKNOWN)) {
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189 | fb_properties_t fb_prop = {
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190 | .addr = fb_addr,
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191 | .offset = 0,
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192 | .x = fb_width,
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193 | .y = fb_height,
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194 | .scan = fb_scanline,
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195 | .visual = visual,
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196 | };
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197 |
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198 | outdev_t *fbdev = fb_init(&fb_prop);
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199 | if (fbdev)
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200 | stdout_wire(fbdev);
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201 | }
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202 |
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203 | return true;
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204 | }
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205 | #endif
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206 |
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207 | void ppc32_post_mm_init(void)
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208 | {
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209 | if (config.cpu_active == 1) {
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210 | #ifdef CONFIG_FB
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211 | ofw_tree_walk_by_device_type("display", display_register, NULL);
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212 | #endif
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213 | /* Map OFW information into sysinfo */
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214 | ofw_sysinfo_map();
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215 |
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216 | /* Initialize IRQ routing */
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217 | irq_init(IRQ_COUNT, IRQ_COUNT);
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218 |
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219 | /* Merge all zones to 1 big zone */
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220 | zone_merge_all();
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221 | }
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222 | }
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223 |
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224 | static bool macio_register(ofw_tree_node_t *node, void *arg)
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225 | {
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226 | ofw_pci_reg_t *assigned_address = NULL;
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227 |
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228 | ofw_tree_property_t *prop = ofw_tree_getprop(node, "assigned-addresses");
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229 | if ((prop) && (prop->value))
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230 | assigned_address = ((ofw_pci_reg_t *) prop->value);
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231 |
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232 | if (assigned_address) {
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233 | /* Initialize PIC */
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234 | pic_init(assigned_address[0].addr, PAGE_SIZE, &pic_cir,
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235 | &pic_cir_arg);
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236 |
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237 | #ifdef CONFIG_MAC_KBD
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238 | uintptr_t pa = assigned_address[0].addr + 0x16000;
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239 | uintptr_t aligned_addr = ALIGN_DOWN(pa, PAGE_SIZE);
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240 | size_t offset = pa - aligned_addr;
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241 | size_t size = 2 * PAGE_SIZE;
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242 |
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243 | cuda_t *cuda = (cuda_t *) (km_map(aligned_addr, offset + size,
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244 | PAGE_WRITE | PAGE_NOT_CACHEABLE) + offset);
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245 |
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246 | /* Initialize I/O controller */
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247 | cuda_instance_t *cuda_instance =
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248 | cuda_init(cuda, IRQ_CUDA, pic_cir, pic_cir_arg);
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249 | if (cuda_instance) {
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250 | kbrd_instance_t *kbrd_instance = kbrd_init();
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251 | if (kbrd_instance) {
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252 | indev_t *sink = stdin_wire();
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253 | indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
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254 | cuda_wire(cuda_instance, kbrd);
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255 | pic_enable_interrupt(IRQ_CUDA);
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256 | }
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257 | }
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258 |
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259 | /*
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260 | * This is the necessary evil until the userspace driver is entirely
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261 | * self-sufficient.
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262 | */
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263 | sysinfo_set_item_val("cuda", NULL, true);
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264 | sysinfo_set_item_val("cuda.inr", NULL, IRQ_CUDA);
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265 | sysinfo_set_item_val("cuda.address.physical", NULL, pa);
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266 | #endif
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267 | }
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268 |
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269 | /* Consider only a single device for now */
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270 | return false;
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271 | }
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272 |
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273 | void irq_initialize_arch(irq_t *irq)
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274 | {
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275 | irq->cir = pic_cir;
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276 | irq->cir_arg = pic_cir_arg;
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277 | irq->preack = true;
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278 | }
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279 |
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280 | void ppc32_post_smp_init(void)
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281 | {
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282 | /* Currently the only supported platform for ppc32 is 'mac'. */
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283 | static const char *platform = "mac";
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284 |
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285 | sysinfo_set_item_data("platform", NULL, (void *) platform,
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286 | str_size(platform));
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287 |
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288 | ofw_tree_walk_by_device_type("mac-io", macio_register, NULL);
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289 | }
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290 |
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291 | void calibrate_delay_loop(void)
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292 | {
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293 | }
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294 |
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295 | void userspace(uspace_arg_t *kernel_uarg)
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296 | {
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297 | userspace_asm((uintptr_t) kernel_uarg->uspace_uarg,
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298 | (uintptr_t) kernel_uarg->uspace_stack +
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299 | kernel_uarg->uspace_stack_size - SP_DELTA,
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300 | (uintptr_t) kernel_uarg->uspace_entry);
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301 |
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302 | /* Unreachable */
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303 | while (true);
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304 | }
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305 |
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306 | /** Construct function pointer
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307 | *
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308 | * @param fptr function pointer structure
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309 | * @param addr function address
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310 | * @param caller calling function address
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311 | *
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312 | * @return address of the function pointer
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313 | *
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314 | */
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315 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
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316 | {
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317 | return addr;
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318 | }
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319 |
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320 | void arch_reboot(void)
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321 | {
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322 | // TODO
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323 | while (true);
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324 | }
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325 |
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326 | /** @}
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327 | */
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