[393f631] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2005 Martin Decky
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[393f631] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[c5429fe] | 29 | /** @addtogroup kernel_ppc32
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[393f631] | 35 | #include <arch.h>
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[36df4109] | 36 | #include <arch/arch.h>
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| 37 | #include <config.h>
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[4037847] | 38 | #include <arch/boot/boot.h>
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[c2417bc] | 39 | #include <genarch/drivers/via-cuda/cuda.h>
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[2a77841d] | 40 | #include <genarch/kbrd/kbrd.h>
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[91d5ad6] | 41 | #include <arch/interrupt.h>
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[3a2f8aa] | 42 | #include <interrupt.h>
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[35f3b8c] | 43 | #include <genarch/fb/fb.h>
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[c0699467] | 44 | #include <abi/fb/visuals.h>
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[e731b0d] | 45 | #include <genarch/ofw/ofw_tree.h>
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| 46 | #include <genarch/ofw/pci.h>
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[e692a27] | 47 | #include <userspace.h>
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[eae4e8f] | 48 | #include <mm/page.h>
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[d4673296] | 49 | #include <mm/km.h>
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[0c91cff] | 50 | #include <time/clock.h>
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[41d33ac] | 51 | #include <console/console.h>
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[3a2f8aa] | 52 | #include <sysinfo/sysinfo.h>
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[f5e39a32] | 53 | #include <ddi/irq.h>
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[982f0fe] | 54 | #include <arch/drivers/pic.h>
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[c2417bc] | 55 | #include <align.h>
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[96e0748d] | 56 | #include <macros.h>
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[19f857a] | 57 | #include <str.h>
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[06e6805] | 58 |
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[96e0748d] | 59 | #define IRQ_COUNT 64
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[c2417bc] | 60 | #define IRQ_CUDA 10
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[f5e39a32] | 61 |
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[36df4109] | 62 | static void ppc32_pre_mm_init(void);
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| 63 | static void ppc32_post_mm_init(void);
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| 64 | static void ppc32_post_smp_init(void);
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| 65 |
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| 66 | arch_ops_t ppc32_ops = {
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| 67 | .pre_mm_init = ppc32_pre_mm_init,
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| 68 | .post_mm_init = ppc32_post_mm_init,
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| 69 | .post_smp_init = ppc32_post_smp_init,
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| 70 | };
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| 71 |
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| 72 | arch_ops_t *arch_ops = &ppc32_ops;
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| 73 |
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[4037847] | 74 | bootinfo_t bootinfo;
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| 75 |
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[3a2f8aa] | 76 | static cir_t pic_cir;
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| 77 | static void *pic_cir_arg;
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| 78 |
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[06f96234] | 79 | /** Performs ppc32-specific initialization before main_bsp() is called. */
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[36df4109] | 80 | void ppc32_pre_main(bootinfo_t *bootinfo)
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[12c7f27] | 81 | {
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[4872160] | 82 | /* Copy tasks map. */
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| 83 | init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
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| 84 | size_t i;
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| 85 | for (i = 0; i < init.cnt; i++) {
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[32817cc] | 86 | init.tasks[i].paddr = KA2PA(bootinfo->taskmap.tasks[i].addr);
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[4872160] | 87 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
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[f4b1535] | 88 | str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
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[4872160] | 89 | bootinfo->taskmap.tasks[i].name);
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| 90 | }
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[a35b458] | 91 |
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[4872160] | 92 | /* Copy physical memory map. */
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| 93 | memmap.total = bootinfo->memmap.total;
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| 94 | memmap.cnt = min(bootinfo->memmap.cnt, MEMMAP_MAX_RECORDS);
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| 95 | for (i = 0; i < memmap.cnt; i++) {
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| 96 | memmap.zones[i].start = bootinfo->memmap.zones[i].start;
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| 97 | memmap.zones[i].size = bootinfo->memmap.zones[i].size;
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[59477e3] | 98 | }
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[a35b458] | 99 |
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[e731b0d] | 100 | /* Copy boot allocations info. */
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[4872160] | 101 | ballocs.base = bootinfo->ballocs.base;
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| 102 | ballocs.size = bootinfo->ballocs.size;
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[a35b458] | 103 |
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[4872160] | 104 | /* Copy OFW tree. */
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| 105 | ofw_tree_init(bootinfo->ofw_root);
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[12c7f27] | 106 | }
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| 107 |
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[36df4109] | 108 | void ppc32_pre_mm_init(void)
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[393f631] | 109 | {
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[91d5ad6] | 110 | /* Initialize dispatch table */
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[8965838e] | 111 | interrupt_init();
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[a35b458] | 112 |
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[0c91cff] | 113 | ofw_tree_node_t *cpus_node;
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| 114 | ofw_tree_node_t *cpu_node;
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| 115 | ofw_tree_property_t *freq_prop;
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| 116 |
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| 117 | cpus_node = ofw_tree_lookup("/cpus");
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| 118 | if (!cpus_node)
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| 119 | panic("Could not find cpus node.");
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| 120 |
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| 121 | cpu_node = cpus_node->child;
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| 122 | if (!cpu_node)
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[1b20da0] | 123 | panic("Could not find first cpu.");
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[0c91cff] | 124 |
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[4a99c57] | 125 | freq_prop = ofw_tree_getprop(cpu_node, "timebase-frequency");
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[0c91cff] | 126 | if (!freq_prop)
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| 127 | panic("Could not get frequency property.");
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| 128 |
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| 129 | uint32_t freq;
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| 130 | freq = *((uint32_t *) freq_prop->value);
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| 131 |
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[8965838e] | 132 | /* Start decrementer */
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[0c91cff] | 133 | decrementer_start(freq / HZ);
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[393f631] | 134 | }
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| 135 |
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[20f8111] | 136 | #ifdef CONFIG_FB
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[e731b0d] | 137 | static bool display_register(ofw_tree_node_t *node, void *arg)
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| 138 | {
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| 139 | uintptr_t fb_addr = 0;
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| 140 | uint32_t fb_width = 0;
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| 141 | uint32_t fb_height = 0;
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| 142 | uint32_t fb_scanline = 0;
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| 143 | unsigned int visual = VISUAL_UNKNOWN;
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[a35b458] | 144 |
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[e731b0d] | 145 | ofw_tree_property_t *prop = ofw_tree_getprop(node, "address");
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| 146 | if ((prop) && (prop->value))
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| 147 | fb_addr = *((uintptr_t *) prop->value);
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[a35b458] | 148 |
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[e731b0d] | 149 | prop = ofw_tree_getprop(node, "width");
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| 150 | if ((prop) && (prop->value))
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| 151 | fb_width = *((uint32_t *) prop->value);
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[a35b458] | 152 |
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[e731b0d] | 153 | prop = ofw_tree_getprop(node, "height");
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| 154 | if ((prop) && (prop->value))
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| 155 | fb_height = *((uint32_t *) prop->value);
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[a35b458] | 156 |
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[e731b0d] | 157 | prop = ofw_tree_getprop(node, "depth");
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| 158 | if ((prop) && (prop->value)) {
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| 159 | uint32_t fb_bpp = *((uint32_t *) prop->value);
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| 160 | switch (fb_bpp) {
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| 161 | case 8:
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| 162 | visual = VISUAL_INDIRECT_8;
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| 163 | break;
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[2e533d6f] | 164 | case 15:
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[e731b0d] | 165 | visual = VISUAL_RGB_5_5_5_BE;
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| 166 | break;
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[2e533d6f] | 167 | case 16:
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| 168 | visual = VISUAL_RGB_5_6_5_BE;
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| 169 | break;
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[e731b0d] | 170 | case 24:
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| 171 | visual = VISUAL_BGR_8_8_8;
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| 172 | break;
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| 173 | case 32:
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| 174 | visual = VISUAL_RGB_0_8_8_8;
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| 175 | break;
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| 176 | default:
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| 177 | visual = VISUAL_UNKNOWN;
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| 178 | }
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| 179 | }
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[a35b458] | 180 |
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[e731b0d] | 181 | prop = ofw_tree_getprop(node, "linebytes");
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| 182 | if ((prop) && (prop->value))
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| 183 | fb_scanline = *((uint32_t *) prop->value);
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[a35b458] | 184 |
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[3bacee1] | 185 | if ((fb_addr) && (fb_width > 0) && (fb_height > 0) &&
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| 186 | (fb_scanline > 0) && (visual != VISUAL_UNKNOWN)) {
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[e731b0d] | 187 | fb_properties_t fb_prop = {
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| 188 | .addr = fb_addr,
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| 189 | .offset = 0,
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| 190 | .x = fb_width,
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| 191 | .y = fb_height,
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| 192 | .scan = fb_scanline,
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| 193 | .visual = visual,
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| 194 | };
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[a35b458] | 195 |
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[a71c158] | 196 | outdev_t *fbdev = fb_init(&fb_prop);
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| 197 | if (fbdev)
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| 198 | stdout_wire(fbdev);
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[e731b0d] | 199 | }
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[a35b458] | 200 |
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[a71c158] | 201 | return true;
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[e731b0d] | 202 | }
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[20f8111] | 203 | #endif
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[e731b0d] | 204 |
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[36df4109] | 205 | void ppc32_post_mm_init(void)
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[393f631] | 206 | {
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[f6a0f06] | 207 | if (config.cpu_active == 1) {
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[d0688a3] | 208 | #ifdef CONFIG_FB
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[e731b0d] | 209 | ofw_tree_walk_by_device_type("display", display_register, NULL);
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[d0688a3] | 210 | #endif
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[de3db94a] | 211 | /* Map OFW information into sysinfo */
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| 212 | ofw_sysinfo_map();
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[a35b458] | 213 |
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[f5e39a32] | 214 | /* Initialize IRQ routing */
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| 215 | irq_init(IRQ_COUNT, IRQ_COUNT);
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[a35b458] | 216 |
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[f6a0f06] | 217 | /* Merge all zones to 1 big zone */
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| 218 | zone_merge_all();
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| 219 | }
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[393f631] | 220 | }
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| 221 |
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[e731b0d] | 222 | static bool macio_register(ofw_tree_node_t *node, void *arg)
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[393f631] | 223 | {
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[e731b0d] | 224 | ofw_pci_reg_t *assigned_address = NULL;
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[a35b458] | 225 |
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[e731b0d] | 226 | ofw_tree_property_t *prop = ofw_tree_getprop(node, "assigned-addresses");
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| 227 | if ((prop) && (prop->value))
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| 228 | assigned_address = ((ofw_pci_reg_t *) prop->value);
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[a35b458] | 229 |
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[e731b0d] | 230 | if (assigned_address) {
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[2a77841d] | 231 | /* Initialize PIC */
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[3a2f8aa] | 232 | pic_init(assigned_address[0].addr, PAGE_SIZE, &pic_cir,
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| 233 | &pic_cir_arg);
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[a35b458] | 234 |
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[2a77841d] | 235 | #ifdef CONFIG_MAC_KBD
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[e731b0d] | 236 | uintptr_t pa = assigned_address[0].addr + 0x16000;
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[2a77841d] | 237 | size_t size = 2 * PAGE_SIZE;
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[a35b458] | 238 |
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[7f7d642] | 239 | cuda_t *cuda = (cuda_t *) km_map(pa, size, KM_NATURAL_ALIGNMENT,
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| 240 | PAGE_WRITE | PAGE_NOT_CACHEABLE);
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[a35b458] | 241 |
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[2a77841d] | 242 | /* Initialize I/O controller */
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| 243 | cuda_instance_t *cuda_instance =
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[3a2f8aa] | 244 | cuda_init(cuda, IRQ_CUDA, pic_cir, pic_cir_arg);
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[2a77841d] | 245 | if (cuda_instance) {
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| 246 | kbrd_instance_t *kbrd_instance = kbrd_init();
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| 247 | if (kbrd_instance) {
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| 248 | indev_t *sink = stdin_wire();
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| 249 | indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
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| 250 | cuda_wire(cuda_instance, kbrd);
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| 251 | pic_enable_interrupt(IRQ_CUDA);
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| 252 | }
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| 253 | }
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[a35b458] | 254 |
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[3a2f8aa] | 255 | /*
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| 256 | * This is the necessary evil until the userspace driver is entirely
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| 257 | * self-sufficient.
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| 258 | */
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| 259 | sysinfo_set_item_val("cuda", NULL, true);
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| 260 | sysinfo_set_item_val("cuda.inr", NULL, IRQ_CUDA);
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| 261 | sysinfo_set_item_val("cuda.address.physical", NULL, pa);
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[2a77841d] | 262 | #endif
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| 263 | }
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[a35b458] | 264 |
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[e731b0d] | 265 | /* Consider only a single device for now */
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| 266 | return false;
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| 267 | }
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| 268 |
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[3a2f8aa] | 269 | void irq_initialize_arch(irq_t *irq)
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| 270 | {
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| 271 | irq->cir = pic_cir;
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| 272 | irq->cir_arg = pic_cir_arg;
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| 273 | irq->preack = true;
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| 274 | }
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| 275 |
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[36df4109] | 276 | void ppc32_post_smp_init(void)
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[e731b0d] | 277 | {
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[eff1f033] | 278 | /* Currently the only supported platform for ppc32 is 'mac'. */
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| 279 | static const char *platform = "mac";
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| 280 |
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| 281 | sysinfo_set_item_data("platform", NULL, (void *) platform,
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| 282 | str_size(platform));
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| 283 |
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[e731b0d] | 284 | ofw_tree_walk_by_device_type("mac-io", macio_register, NULL);
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[393f631] | 285 | }
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| 286 |
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| 287 | void calibrate_delay_loop(void)
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| 288 | {
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| 289 | }
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[8965838e] | 290 |
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[3fcea34] | 291 | uintptr_t arch_get_initial_sp(uintptr_t stack_base, uintptr_t stack_size)
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[e692a27] | 292 | {
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[3fcea34] | 293 | return stack_base + stack_size - SP_DELTA;
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| 294 | }
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[a35b458] | 295 |
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[3fcea34] | 296 | void userspace(uintptr_t pc, uintptr_t sp)
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| 297 | {
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| 298 | userspace_asm(0, sp, pc);
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[88e43bc] | 299 | unreachable();
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[e692a27] | 300 | }
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[41d33ac] | 301 |
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[6da1013f] | 302 | /** Construct function pointer
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| 303 | *
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| 304 | * @param fptr function pointer structure
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| 305 | * @param addr function address
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| 306 | * @param caller calling function address
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| 307 | *
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| 308 | * @return address of the function pointer
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| 309 | *
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| 310 | */
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| 311 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
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| 312 | {
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| 313 | return addr;
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| 314 | }
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| 315 |
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[c2417bc] | 316 | void arch_reboot(void)
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| 317 | {
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| 318 | // TODO
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[3bacee1] | 319 | while (true)
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| 320 | ;
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[c2417bc] | 321 | }
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| 322 |
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[281994b] | 323 | /** @}
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[b45c443] | 324 | */
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