[613bc54] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Martin Decky
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[613bc54] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[c5429fe] | 29 | /** @addtogroup kernel_ppc32_mm
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[10e0cee] | 35 | #include <arch/mm/tlb.h>
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[26fa0f9f] | 36 | #include <interrupt.h>
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[eef1b031] | 37 | #include <typedefs.h>
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[10e0cee] | 38 |
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[6c3106f] | 39 | void tlb_refill(unsigned int n, istate_t *istate)
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[10e0cee] | 40 | {
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[6c3106f] | 41 | uint32_t tlbmiss;
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| 42 | ptehi_t ptehi;
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| 43 | ptelo_t ptelo;
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[a35b458] | 44 |
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[6c3106f] | 45 | asm volatile (
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[1433ecda] | 46 | "mfspr %[tlbmiss], 980\n"
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| 47 | "mfspr %[ptehi], 981\n"
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| 48 | "mfspr %[ptelo], 982\n"
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| 49 | : [tlbmiss] "=r" (tlbmiss),
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| 50 | [ptehi] "=r" (ptehi),
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| 51 | [ptelo] "=r" (ptelo)
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[6c3106f] | 52 | );
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[a35b458] | 53 |
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[0867321] | 54 | uint32_t badvaddr = tlbmiss & 0xfffffffc;
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[da1bafb] | 55 | uint32_t physmem = physmem_top();
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[a35b458] | 56 |
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[0867321] | 57 | if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem)))
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| 58 | return; // FIXME
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[a35b458] | 59 |
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[0867321] | 60 | ptelo.rpn = KA2PA(badvaddr) >> 12;
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| 61 | ptelo.wimg = 0;
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| 62 | ptelo.pp = 2; // FIXME
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[a35b458] | 63 |
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[0867321] | 64 | uint32_t index = 0;
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| 65 | asm volatile (
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[1433ecda] | 66 | "mtspr 981, %[ptehi]\n"
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| 67 | "mtspr 982, %[ptelo]\n"
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| 68 | "tlbld %[index]\n"
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| 69 | "tlbli %[index]\n"
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| 70 | : [index] "=r" (index)
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| 71 | : [ptehi] "r" (ptehi),
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| 72 | [ptelo] "r" (ptelo)
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[0867321] | 73 | );
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| 74 | }
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| 75 |
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[613bc54] | 76 | void tlb_arch_init(void)
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[a33c990] | 77 | {
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| 78 | tlb_invalidate_all();
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| 79 | }
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| 80 |
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| 81 | void tlb_invalidate_all(void)
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[613bc54] | 82 | {
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[9a68b34d] | 83 | asm volatile (
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[1433ecda] | 84 | "sync\n"
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[655f70b] | 85 | );
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[a35b458] | 86 |
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[655f70b] | 87 | for (unsigned int i = 0; i < 0x00040000; i += 0x00001000) {
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| 88 | asm volatile (
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[1433ecda] | 89 | "tlbie %[i]\n"
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| 90 | :: [i] "r" (i)
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[655f70b] | 91 | );
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| 92 | }
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[a35b458] | 93 |
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[655f70b] | 94 | asm volatile (
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[1433ecda] | 95 | "eieio\n"
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| 96 | "tlbsync\n"
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| 97 | "sync\n"
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[9a68b34d] | 98 | );
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[613bc54] | 99 | }
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| 100 |
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[a33c990] | 101 | void tlb_invalidate_asid(asid_t asid)
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[68965ec5] | 102 | {
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[a33c990] | 103 | tlb_invalidate_all();
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[68965ec5] | 104 | }
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| 105 |
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[98000fb] | 106 | void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt)
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[a33c990] | 107 | {
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| 108 | tlb_invalidate_all();
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| 109 | }
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| 110 |
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[e600ec4] | 111 | #define PRINT_BAT(name, ureg, lreg) \
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| 112 | asm volatile ( \
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[da1bafb] | 113 | "mfspr %[upper], " #ureg "\n" \
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| 114 | "mfspr %[lower], " #lreg "\n" \
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| 115 | : [upper] "=r" (upper), \
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| 116 | [lower] "=r" (lower) \
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[e600ec4] | 117 | ); \
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[da1bafb] | 118 | \
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[e600ec4] | 119 | mask = (upper & 0x1ffc) >> 2; \
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| 120 | if (upper & 3) { \
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[7f1c620] | 121 | uint32_t tmp = mask; \
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[e600ec4] | 122 | length = 128; \
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[da1bafb] | 123 | \
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[e600ec4] | 124 | while (tmp) { \
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| 125 | if ((tmp & 1) == 0) { \
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| 126 | printf("ibat[0]: error in mask\n"); \
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| 127 | break; \
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| 128 | } \
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| 129 | length <<= 1; \
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| 130 | tmp >>= 1; \
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| 131 | } \
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| 132 | } else \
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| 133 | length = 0; \
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[da1bafb] | 134 | \
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[7e752b2] | 135 | printf(name ": page=%#0" PRIx32 " frame=%#0" PRIx32 \
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| 136 | " length=%#0" PRIx32 " KB (mask=%#0" PRIx32 ")%s%s\n", \
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| 137 | upper & UINT32_C(0xffff0000), lower & UINT32_C(0xffff0000), \
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| 138 | length, mask, \
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[5d67baa] | 139 | ((upper >> 1) & 1) ? " supervisor" : "", \
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| 140 | (upper & 1) ? " user" : "");
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[e600ec4] | 141 |
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[613bc54] | 142 | void tlb_print(void)
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| 143 | {
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[7f1c620] | 144 | uint32_t sr;
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[a35b458] | 145 |
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[cf84d72a] | 146 | for (sr = 0; sr < 16; sr++) {
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[da1bafb] | 147 | uint32_t vsid = sr_get(sr << 28);
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[a35b458] | 148 |
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[7e752b2] | 149 | printf("sr[%02" PRIu32 "]: vsid=%#0" PRIx32 " (asid=%" PRIu32 ")"
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| 150 | "%s%s\n", sr, vsid & UINT32_C(0x00ffffff),
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| 151 | (vsid & UINT32_C(0x00ffffff)) >> 4,
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[5d67baa] | 152 | ((vsid >> 30) & 1) ? " supervisor" : "",
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| 153 | ((vsid >> 29) & 1) ? " user" : "");
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[cf84d72a] | 154 | }
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[a35b458] | 155 |
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[7f1c620] | 156 | uint32_t upper;
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| 157 | uint32_t lower;
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| 158 | uint32_t mask;
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| 159 | uint32_t length;
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[a35b458] | 160 |
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[e600ec4] | 161 | PRINT_BAT("ibat[0]", 528, 529);
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| 162 | PRINT_BAT("ibat[1]", 530, 531);
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| 163 | PRINT_BAT("ibat[2]", 532, 533);
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| 164 | PRINT_BAT("ibat[3]", 534, 535);
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[a35b458] | 165 |
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[e600ec4] | 166 | PRINT_BAT("dbat[0]", 536, 537);
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| 167 | PRINT_BAT("dbat[1]", 538, 539);
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| 168 | PRINT_BAT("dbat[2]", 540, 541);
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| 169 | PRINT_BAT("dbat[3]", 542, 543);
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[613bc54] | 170 | }
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[b45c443] | 171 |
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[10e0cee] | 172 | /** @}
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[b45c443] | 173 | */
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