source: mainline/kernel/arch/ppc32/src/exception.S@ 5a42886

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 5a42886 was 3fde837, checked in by Jakub Jermar <jakub@…>, 11 years ago

Construct proper stack frame linkage when the previous mode was kernel.
  • Property mode set to 100644
File size: 5.8 KB
Line 
1#
2# Copyright (c) 2006 Martin Decky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <arch/asm/regname.h>
30#include <arch/msr.h>
31#include <arch/mm/page.h>
32#include <arch/istate_struct.h>
33#include <arch/stack.h>
34#include <align.h>
35
36.section K_UNMAPPED_TEXT_START, "ax"
37
38.macro CONTEXT_STORE
39
40 # save r12 in SPRG1, backup CR in r12
41 # save SP in SPRG2
42
43 mtsprg1 r12
44 mfcr r12
45 mtsprg2 sp
46
47 # check whether the previous mode was user or kernel
48
49 mfsrr1 sp # use sp as a temporary register to hold SRR1
50 andi. sp, sp, MSR_PR
51 bne 1f
52 # previous mode was kernel
53
54 mfsprg2 sp
55 subis sp, sp, 0x8000
56 b 2f
57
58 1:
59 # previous mode was user
60
61 mfsprg0 sp
62 2:
63
64 subi sp, sp, ALIGN_UP(ISTATE_SIZE, STACK_ALIGNMENT)
65 stw r0, ISTATE_OFFSET_R0(sp)
66 stw r2, ISTATE_OFFSET_R2(sp)
67 stw r3, ISTATE_OFFSET_R3(sp)
68 stw r4, ISTATE_OFFSET_R4(sp)
69 stw r5, ISTATE_OFFSET_R5(sp)
70 stw r6, ISTATE_OFFSET_R6(sp)
71 stw r7, ISTATE_OFFSET_R7(sp)
72 stw r8, ISTATE_OFFSET_R8(sp)
73 stw r9, ISTATE_OFFSET_R9(sp)
74 stw r10, ISTATE_OFFSET_R10(sp)
75 stw r11, ISTATE_OFFSET_R11(sp)
76 stw r13, ISTATE_OFFSET_R13(sp)
77 stw r14, ISTATE_OFFSET_R14(sp)
78 stw r15, ISTATE_OFFSET_R15(sp)
79 stw r16, ISTATE_OFFSET_R16(sp)
80 stw r17, ISTATE_OFFSET_R17(sp)
81 stw r18, ISTATE_OFFSET_R18(sp)
82 stw r19, ISTATE_OFFSET_R19(sp)
83 stw r20, ISTATE_OFFSET_R20(sp)
84 stw r21, ISTATE_OFFSET_R21(sp)
85 stw r22, ISTATE_OFFSET_R22(sp)
86 stw r23, ISTATE_OFFSET_R23(sp)
87 stw r24, ISTATE_OFFSET_R24(sp)
88 stw r25, ISTATE_OFFSET_R25(sp)
89 stw r26, ISTATE_OFFSET_R26(sp)
90 stw r27, ISTATE_OFFSET_R27(sp)
91 stw r28, ISTATE_OFFSET_R28(sp)
92 stw r29, ISTATE_OFFSET_R29(sp)
93 stw r30, ISTATE_OFFSET_R30(sp)
94 stw r31, ISTATE_OFFSET_R31(sp)
95
96 stw r12, ISTATE_OFFSET_CR(sp)
97
98 mfsrr0 r12
99 stw r12, ISTATE_OFFSET_PC(sp)
100
101 mfsrr1 r12
102 stw r12, ISTATE_OFFSET_SRR1(sp)
103
104 mflr r12
105 stw r12, ISTATE_OFFSET_LR(sp)
106
107 mfctr r12
108 stw r12, ISTATE_OFFSET_CTR(sp)
109
110 mfxer r12
111 stw r12, ISTATE_OFFSET_XER(sp)
112
113 mfdar r12
114 stw r12, ISTATE_OFFSET_DAR(sp)
115
116 mfsprg1 r12
117 stw r12, ISTATE_OFFSET_R12(sp)
118
119 mfsprg2 r12
120 stw r12, ISTATE_OFFSET_SP(sp)
121
122 li r12, 0
123 stw r12, ISTATE_OFFSET_LR_FRAME(sp)
124 stw r12, ISTATE_OFFSET_SP_FRAME(sp)
125.endm
126
127.org 0x100
128.global exc_system_reset
129exc_system_reset:
130 CONTEXT_STORE
131
132 li r3, 0
133 b jump_to_kernel
134
135.org 0x200
136.global exc_machine_check
137exc_machine_check:
138 CONTEXT_STORE
139
140 li r3, 1
141 b jump_to_kernel
142
143.org 0x300
144.global exc_data_storage
145exc_data_storage:
146 CONTEXT_STORE
147
148 li r3, 2
149 b jump_to_kernel
150
151.org 0x400
152.global exc_instruction_storage
153exc_instruction_storage:
154 CONTEXT_STORE
155
156 li r3, 3
157 b jump_to_kernel
158
159.org 0x500
160.global exc_external
161exc_external:
162 CONTEXT_STORE
163
164 li r3, 4
165 b jump_to_kernel
166
167.org 0x600
168.global exc_alignment
169exc_alignment:
170 CONTEXT_STORE
171
172 li r3, 5
173 b jump_to_kernel
174
175.org 0x700
176.global exc_program
177exc_program:
178 CONTEXT_STORE
179
180 li r3, 6
181 b jump_to_kernel
182
183.org 0x800
184.global exc_fp_unavailable
185exc_fp_unavailable:
186 CONTEXT_STORE
187
188 li r3, 7
189 b jump_to_kernel
190
191.org 0x900
192.global exc_decrementer
193exc_decrementer:
194 CONTEXT_STORE
195
196 li r3, 8
197 b jump_to_kernel
198
199.org 0xa00
200.global exc_reserved0
201exc_reserved0:
202 CONTEXT_STORE
203
204 li r3, 9
205 b jump_to_kernel
206
207.org 0xb00
208.global exc_reserved1
209exc_reserved1:
210 CONTEXT_STORE
211
212 li r3, 10
213 b jump_to_kernel
214
215.org 0xc00
216.global exc_syscall
217exc_syscall:
218 CONTEXT_STORE
219
220 b jump_to_kernel_syscall
221
222.org 0xd00
223.global exc_trace
224exc_trace:
225 CONTEXT_STORE
226
227 li r3, 12
228 b jump_to_kernel
229
230.org 0x1000
231.global exc_itlb_miss
232exc_itlb_miss:
233 CONTEXT_STORE
234
235 li r3, 13
236 b jump_to_kernel
237
238.org 0x1100
239.global exc_dtlb_miss_load
240exc_dtlb_miss_load:
241 CONTEXT_STORE
242
243 li r3, 14
244 b jump_to_kernel
245
246.org 0x1200
247.global exc_dtlb_miss_store
248exc_dtlb_miss_store:
249 CONTEXT_STORE
250
251 li r3, 15
252 b jump_to_kernel
253
254.org 0x4000
255jump_to_kernel:
256 mfsrr1 r5
257 andi. r5, r5, MSR_PR
258 bne 1f
259 # Previous mode was kernel.
260 # We can construct a proper frame linkage.
261
262 mfsrr0 r12
263 stw r12, ISTATE_OFFSET_LR_FRAME(sp)
264 mfsprg2 r12
265 stw r12, ISTATE_OFFSET_SP_FRAME(sp)
266 1:
267
268 lis r12, iret@ha
269 addi r12, r12, iret@l
270 mtlr r12
271
272 lis r12, exc_dispatch@ha
273 addi r12, r12, exc_dispatch@l
274 mtsrr0 r12
275
276 mfmsr r12
277 mfsrr1 r5
278 andi. r5, r5, MSR_FP
279 or r12, r12, r5 # Propagate MSR_FP from SRR1 to MSR
280 ori r12, r12, (MSR_IR | MSR_DR)
281 mtsrr1 r12
282
283 addis sp, sp, 0x8000
284 mr r4, sp
285
286 rfi
287
288jump_to_kernel_syscall:
289 lis r12, syscall_handler@ha
290 addi r12, r12, syscall_handler@l
291 mtsrr0 r12
292
293 lis r12, iret_syscall@ha
294 addi r12, r12, iret_syscall@l
295 mtlr r12
296
297 mfsrr1 r0
298 andi. r0, r0, MSR_FP
299 mfmsr r12
300 or r12, r12, r0 # Propagate MSR_FP from SRR1 to MSR
301 ori r12, r12, (MSR_IR | MSR_DR)
302 mtsrr1 r12
303
304 addis sp, sp, 0x8000
305 rfi
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