| 1 | /*
|
|---|
| 2 | * Copyright (c) 2005 Martin Decky
|
|---|
| 3 | * All rights reserved.
|
|---|
| 4 | *
|
|---|
| 5 | * Redistribution and use in source and binary forms, with or without
|
|---|
| 6 | * modification, are permitted provided that the following conditions
|
|---|
| 7 | * are met:
|
|---|
| 8 | *
|
|---|
| 9 | * - Redistributions of source code must retain the above copyright
|
|---|
| 10 | * notice, this list of conditions and the following disclaimer.
|
|---|
| 11 | * - Redistributions in binary form must reproduce the above copyright
|
|---|
| 12 | * notice, this list of conditions and the following disclaimer in the
|
|---|
| 13 | * documentation and/or other materials provided with the distribution.
|
|---|
| 14 | * - The name of the author may not be used to endorse or promote products
|
|---|
| 15 | * derived from this software without specific prior written permission.
|
|---|
| 16 | *
|
|---|
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
|---|
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
|---|
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
|---|
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
|---|
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|---|
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|---|
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|---|
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
|---|
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| 27 | */
|
|---|
| 28 |
|
|---|
| 29 | #include <abi/asmtool.h>
|
|---|
| 30 | #include <arch/asm/regname.h>
|
|---|
| 31 | #include <arch/msr.h>
|
|---|
| 32 | #include <arch/istate_struct.h>
|
|---|
| 33 |
|
|---|
| 34 | .text
|
|---|
| 35 |
|
|---|
| 36 | FUNCTION_BEGIN(userspace_asm)
|
|---|
| 37 | /*
|
|---|
| 38 | * r3 = uspace_uarg
|
|---|
| 39 | * r4 = stack
|
|---|
| 40 | * r5 = entry
|
|---|
| 41 | */
|
|---|
| 42 |
|
|---|
| 43 | /* Disable interrupts */
|
|---|
| 44 |
|
|---|
| 45 | mfmsr r31
|
|---|
| 46 | rlwinm r31, r31, 0, 17, 15
|
|---|
| 47 | mtmsr r31
|
|---|
| 48 | isync
|
|---|
| 49 |
|
|---|
| 50 | /* Set entry point */
|
|---|
| 51 |
|
|---|
| 52 | mtsrr0 r5
|
|---|
| 53 |
|
|---|
| 54 | /* Set privileged state, enable interrupts */
|
|---|
| 55 |
|
|---|
| 56 | ori r31, r31, MSR_PR
|
|---|
| 57 | ori r31, r31, MSR_EE
|
|---|
| 58 | mtsrr1 r31
|
|---|
| 59 |
|
|---|
| 60 | /* Set stack */
|
|---|
| 61 |
|
|---|
| 62 | mr sp, r4
|
|---|
| 63 |
|
|---|
| 64 | /* %r6 is defined to hold pcb_ptr - set it to 0 */
|
|---|
| 65 |
|
|---|
| 66 | xor r6, r6, r6
|
|---|
| 67 |
|
|---|
| 68 | /* Jump to userspace */
|
|---|
| 69 |
|
|---|
| 70 | rfi
|
|---|
| 71 | FUNCTION_END(userspace_asm)
|
|---|
| 72 |
|
|---|
| 73 | SYMBOL(iret)
|
|---|
| 74 | /* Disable interrupts */
|
|---|
| 75 |
|
|---|
| 76 | mfmsr r31
|
|---|
| 77 | rlwinm r31, r31, 0, 17, 15
|
|---|
| 78 | mtmsr r31
|
|---|
| 79 | isync
|
|---|
| 80 |
|
|---|
| 81 | lwz r0, ISTATE_OFFSET_R0(sp)
|
|---|
| 82 | lwz r2, ISTATE_OFFSET_R2(sp)
|
|---|
| 83 | lwz r3, ISTATE_OFFSET_R3(sp)
|
|---|
| 84 | lwz r4, ISTATE_OFFSET_R4(sp)
|
|---|
| 85 | lwz r5, ISTATE_OFFSET_R5(sp)
|
|---|
| 86 | lwz r6, ISTATE_OFFSET_R6(sp)
|
|---|
| 87 | lwz r7, ISTATE_OFFSET_R7(sp)
|
|---|
| 88 | lwz r8, ISTATE_OFFSET_R8(sp)
|
|---|
| 89 | lwz r9, ISTATE_OFFSET_R9(sp)
|
|---|
| 90 | lwz r10, ISTATE_OFFSET_R10(sp)
|
|---|
| 91 | lwz r11, ISTATE_OFFSET_R11(sp)
|
|---|
| 92 | lwz r13, ISTATE_OFFSET_R13(sp)
|
|---|
| 93 | lwz r14, ISTATE_OFFSET_R14(sp)
|
|---|
| 94 | lwz r15, ISTATE_OFFSET_R15(sp)
|
|---|
| 95 | lwz r16, ISTATE_OFFSET_R16(sp)
|
|---|
| 96 | lwz r17, ISTATE_OFFSET_R17(sp)
|
|---|
| 97 | lwz r18, ISTATE_OFFSET_R18(sp)
|
|---|
| 98 | lwz r19, ISTATE_OFFSET_R19(sp)
|
|---|
| 99 | lwz r20, ISTATE_OFFSET_R20(sp)
|
|---|
| 100 | lwz r21, ISTATE_OFFSET_R21(sp)
|
|---|
| 101 | lwz r22, ISTATE_OFFSET_R22(sp)
|
|---|
| 102 | lwz r23, ISTATE_OFFSET_R23(sp)
|
|---|
| 103 | lwz r24, ISTATE_OFFSET_R24(sp)
|
|---|
| 104 | lwz r25, ISTATE_OFFSET_R25(sp)
|
|---|
| 105 | lwz r26, ISTATE_OFFSET_R26(sp)
|
|---|
| 106 | lwz r27, ISTATE_OFFSET_R27(sp)
|
|---|
| 107 | lwz r28, ISTATE_OFFSET_R28(sp)
|
|---|
| 108 | lwz r29, ISTATE_OFFSET_R29(sp)
|
|---|
| 109 | lwz r30, ISTATE_OFFSET_R30(sp)
|
|---|
| 110 | lwz r31, ISTATE_OFFSET_R31(sp)
|
|---|
| 111 |
|
|---|
| 112 | lwz r12, ISTATE_OFFSET_CR(sp)
|
|---|
| 113 | mtcr r12
|
|---|
| 114 |
|
|---|
| 115 | lwz r12, ISTATE_OFFSET_PC(sp)
|
|---|
| 116 | mtsrr0 r12
|
|---|
| 117 |
|
|---|
| 118 | lwz r12, ISTATE_OFFSET_SRR1(sp)
|
|---|
| 119 | mtsrr1 r12
|
|---|
| 120 |
|
|---|
| 121 | lwz r12, ISTATE_OFFSET_LR(sp)
|
|---|
| 122 | mtlr r12
|
|---|
| 123 |
|
|---|
| 124 | lwz r12, ISTATE_OFFSET_CTR(sp)
|
|---|
| 125 | mtctr r12
|
|---|
| 126 |
|
|---|
| 127 | lwz r12, ISTATE_OFFSET_XER(sp)
|
|---|
| 128 | mtxer r12
|
|---|
| 129 |
|
|---|
| 130 | lwz r12, ISTATE_OFFSET_R12(sp)
|
|---|
| 131 | lwz sp, ISTATE_OFFSET_SP(sp)
|
|---|
| 132 |
|
|---|
| 133 | rfi
|
|---|
| 134 |
|
|---|
| 135 | SYMBOL(iret_syscall)
|
|---|
| 136 | /* Disable interrupts */
|
|---|
| 137 |
|
|---|
| 138 | mfmsr r31
|
|---|
| 139 | rlwinm r31, r31, 0, 17, 15
|
|---|
| 140 | mtmsr r31
|
|---|
| 141 | isync
|
|---|
| 142 |
|
|---|
| 143 | lwz r0, ISTATE_OFFSET_R0(sp)
|
|---|
| 144 | lwz r2, ISTATE_OFFSET_R2(sp)
|
|---|
| 145 | lwz r4, ISTATE_OFFSET_R4(sp)
|
|---|
| 146 | lwz r5, ISTATE_OFFSET_R5(sp)
|
|---|
| 147 | lwz r6, ISTATE_OFFSET_R6(sp)
|
|---|
| 148 | lwz r7, ISTATE_OFFSET_R7(sp)
|
|---|
| 149 | lwz r8, ISTATE_OFFSET_R8(sp)
|
|---|
| 150 | lwz r9, ISTATE_OFFSET_R9(sp)
|
|---|
| 151 | lwz r10, ISTATE_OFFSET_R10(sp)
|
|---|
| 152 | lwz r11, ISTATE_OFFSET_R11(sp)
|
|---|
| 153 | lwz r13, ISTATE_OFFSET_R13(sp)
|
|---|
| 154 | lwz r14, ISTATE_OFFSET_R14(sp)
|
|---|
| 155 | lwz r15, ISTATE_OFFSET_R15(sp)
|
|---|
| 156 | lwz r16, ISTATE_OFFSET_R16(sp)
|
|---|
| 157 | lwz r17, ISTATE_OFFSET_R17(sp)
|
|---|
| 158 | lwz r18, ISTATE_OFFSET_R18(sp)
|
|---|
| 159 | lwz r19, ISTATE_OFFSET_R19(sp)
|
|---|
| 160 | lwz r20, ISTATE_OFFSET_R20(sp)
|
|---|
| 161 | lwz r21, ISTATE_OFFSET_R21(sp)
|
|---|
| 162 | lwz r22, ISTATE_OFFSET_R22(sp)
|
|---|
| 163 | lwz r23, ISTATE_OFFSET_R23(sp)
|
|---|
| 164 | lwz r24, ISTATE_OFFSET_R24(sp)
|
|---|
| 165 | lwz r25, ISTATE_OFFSET_R25(sp)
|
|---|
| 166 | lwz r26, ISTATE_OFFSET_R26(sp)
|
|---|
| 167 | lwz r27, ISTATE_OFFSET_R27(sp)
|
|---|
| 168 | lwz r28, ISTATE_OFFSET_R28(sp)
|
|---|
| 169 | lwz r29, ISTATE_OFFSET_R29(sp)
|
|---|
| 170 | lwz r30, ISTATE_OFFSET_R30(sp)
|
|---|
| 171 | lwz r31, ISTATE_OFFSET_R31(sp)
|
|---|
| 172 |
|
|---|
| 173 | lwz r12, ISTATE_OFFSET_CR(sp)
|
|---|
| 174 | mtcr r12
|
|---|
| 175 |
|
|---|
| 176 | lwz r12, ISTATE_OFFSET_PC(sp)
|
|---|
| 177 | mtsrr0 r12
|
|---|
| 178 |
|
|---|
| 179 | lwz r12, ISTATE_OFFSET_SRR1(sp)
|
|---|
| 180 | mtsrr1 r12
|
|---|
| 181 |
|
|---|
| 182 | lwz r12, ISTATE_OFFSET_LR(sp)
|
|---|
| 183 | mtlr r12
|
|---|
| 184 |
|
|---|
| 185 | lwz r12, ISTATE_OFFSET_CTR(sp)
|
|---|
| 186 | mtctr r12
|
|---|
| 187 |
|
|---|
| 188 | lwz r12, ISTATE_OFFSET_XER(sp)
|
|---|
| 189 | mtxer r12
|
|---|
| 190 |
|
|---|
| 191 | lwz r12, ISTATE_OFFSET_R12(sp)
|
|---|
| 192 | lwz sp, ISTATE_OFFSET_SP(sp)
|
|---|
| 193 |
|
|---|
| 194 | rfi
|
|---|
| 195 |
|
|---|
| 196 | FUNCTION_BEGIN(memcpy_from_uspace)
|
|---|
| 197 | FUNCTION_BEGIN(memcpy_to_uspace)
|
|---|
| 198 | srwi. r7, r5, 3
|
|---|
| 199 | addi r6, r3, -4
|
|---|
| 200 | addi r4, r4, -4
|
|---|
| 201 | beq 2f
|
|---|
| 202 |
|
|---|
| 203 | andi. r0, r6, 3
|
|---|
| 204 | mtctr r7
|
|---|
| 205 | bne 5f
|
|---|
| 206 |
|
|---|
| 207 | 1:
|
|---|
| 208 |
|
|---|
| 209 | lwz r7, 4(r4)
|
|---|
| 210 | lwzu r8, 8(r4)
|
|---|
| 211 | stw r7, 4(r6)
|
|---|
| 212 | stwu r8, 8(r6)
|
|---|
| 213 | bdnz 1b
|
|---|
| 214 |
|
|---|
| 215 | andi. r5, r5, 7
|
|---|
| 216 |
|
|---|
| 217 | 2:
|
|---|
| 218 |
|
|---|
| 219 | cmplwi 0, r5, 4
|
|---|
| 220 | blt 3f
|
|---|
| 221 |
|
|---|
| 222 | lwzu r0, 4(r4)
|
|---|
| 223 | addi r5, r5, -4
|
|---|
| 224 | stwu r0, 4(r6)
|
|---|
| 225 |
|
|---|
| 226 | 3:
|
|---|
| 227 |
|
|---|
| 228 | cmpwi 0, r5, 0
|
|---|
| 229 | beqlr
|
|---|
| 230 | mtctr r5
|
|---|
| 231 | addi r4, r4, 3
|
|---|
| 232 | addi r6, r6, 3
|
|---|
| 233 |
|
|---|
| 234 | 4:
|
|---|
| 235 |
|
|---|
| 236 | lbzu r0, 1(r4)
|
|---|
| 237 | stbu r0, 1(r6)
|
|---|
| 238 | bdnz 4b
|
|---|
| 239 | blr
|
|---|
| 240 |
|
|---|
| 241 | 5:
|
|---|
| 242 |
|
|---|
| 243 | subfic r0, r0, 4
|
|---|
| 244 | mtctr r0
|
|---|
| 245 |
|
|---|
| 246 | 6:
|
|---|
| 247 |
|
|---|
| 248 | lbz r7, 4(r4)
|
|---|
| 249 | addi r4, r4, 1
|
|---|
| 250 | stb r7, 4(r6)
|
|---|
| 251 | addi r6, r6, 1
|
|---|
| 252 | bdnz 6b
|
|---|
| 253 | subf r5, r0, r5
|
|---|
| 254 | rlwinm. r7, r5, 32-3, 3, 31
|
|---|
| 255 | beq 2b
|
|---|
| 256 | mtctr r7
|
|---|
| 257 | b 1b
|
|---|
| 258 | FUNCTION_END(memcpy_from_uspace)
|
|---|
| 259 | FUNCTION_END(memcpy_to_uspace)
|
|---|
| 260 |
|
|---|
| 261 | SYMBOL(memcpy_from_uspace_failover_address)
|
|---|
| 262 | SYMBOL(memcpy_to_uspace_failover_address)
|
|---|
| 263 | /* Return zero, failure */
|
|---|
| 264 | xor r3, r3, r3
|
|---|
| 265 | blr
|
|---|
| 266 |
|
|---|
| 267 | FUNCTION_BEGIN(early_putwchar)
|
|---|
| 268 | blr
|
|---|
| 269 | FUNCTION_END(early_putwchar)
|
|---|
