source: mainline/kernel/arch/ppc32/src/asm.S@ 0867321

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 0867321 was 826c203, checked in by Martin Decky <martin@…>, 17 years ago

avoid nasty race condition during page fault handling
  • Property mode set to 100644
File size: 4.5 KB
Line 
1#
2# Copyright (c) 2005 Martin Decky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <arch/asm/regname.h>
30
31.text
32
33.global userspace_asm
34.global iret
35.global iret_syscall
36.global memsetb
37.global memcpy
38.global memcpy_from_uspace
39.global memcpy_to_uspace
40.global memcpy_from_uspace_failover_address
41.global memcpy_to_uspace_failover_address
42
43userspace_asm:
44
45 # r3 = uspace_uarg
46 # r4 = stack
47 # r5 = entry
48
49 # disable interrupts
50
51 mfmsr r31
52 rlwinm r31, r31, 0, 17, 15
53 mtmsr r31
54
55 # set entry point
56
57 mtsrr0 r5
58
59 # set problem state, enable interrupts
60
61 ori r31, r31, msr_pr
62 ori r31, r31, msr_ee
63 mtsrr1 r31
64
65 # set stack
66
67 mr sp, r4
68
69 # %r6 is defined to hold pcb_ptr - set it to 0
70
71 xor r6, r6, r6
72
73 # jump to userspace
74
75 rfi
76
77iret:
78
79 # disable interrupts
80
81 mfmsr r31
82 rlwinm r31, r31, 0, 17, 15
83 mtmsr r31
84
85 lwz r0, 8(sp)
86 lwz r2, 12(sp)
87 lwz r3, 16(sp)
88 lwz r4, 20(sp)
89 lwz r5, 24(sp)
90 lwz r6, 28(sp)
91 lwz r7, 32(sp)
92 lwz r8, 36(sp)
93 lwz r9, 40(sp)
94 lwz r10, 44(sp)
95 lwz r11, 48(sp)
96 lwz r13, 52(sp)
97 lwz r14, 56(sp)
98 lwz r15, 60(sp)
99 lwz r16, 64(sp)
100 lwz r17, 68(sp)
101 lwz r18, 72(sp)
102 lwz r19, 76(sp)
103 lwz r20, 80(sp)
104 lwz r21, 84(sp)
105 lwz r22, 88(sp)
106 lwz r23, 92(sp)
107 lwz r24, 96(sp)
108 lwz r25, 100(sp)
109 lwz r26, 104(sp)
110 lwz r27, 108(sp)
111 lwz r28, 112(sp)
112 lwz r29, 116(sp)
113 lwz r30, 120(sp)
114 lwz r31, 124(sp)
115
116 lwz r12, 128(sp)
117 mtcr r12
118
119 lwz r12, 132(sp)
120 mtsrr0 r12
121
122 lwz r12, 136(sp)
123 mtsrr1 r12
124
125 lwz r12, 140(sp)
126 mtlr r12
127
128 lwz r12, 144(sp)
129 mtctr r12
130
131 lwz r12, 148(sp)
132 mtxer r12
133
134 lwz r12, 156(sp)
135 lwz sp, 160(sp)
136
137 rfi
138
139iret_syscall:
140
141 # reset decrementer
142
143 li r31, 1000
144 mtdec r31
145
146 # disable interrupts
147
148 mfmsr r31
149 rlwinm r31, r31, 0, 17, 15
150 mtmsr r31
151
152 lwz r0, 8(sp)
153 lwz r2, 12(sp)
154 lwz r4, 20(sp)
155 lwz r5, 24(sp)
156 lwz r6, 28(sp)
157 lwz r7, 32(sp)
158 lwz r8, 36(sp)
159 lwz r9, 40(sp)
160 lwz r10, 44(sp)
161 lwz r11, 48(sp)
162 lwz r13, 52(sp)
163 lwz r14, 56(sp)
164 lwz r15, 60(sp)
165 lwz r16, 64(sp)
166 lwz r17, 68(sp)
167 lwz r18, 72(sp)
168 lwz r19, 76(sp)
169 lwz r20, 80(sp)
170 lwz r21, 84(sp)
171 lwz r22, 88(sp)
172 lwz r23, 92(sp)
173 lwz r24, 96(sp)
174 lwz r25, 100(sp)
175 lwz r26, 104(sp)
176 lwz r27, 108(sp)
177 lwz r28, 112(sp)
178 lwz r29, 116(sp)
179 lwz r30, 120(sp)
180 lwz r31, 124(sp)
181
182 lwz r12, 128(sp)
183 mtcr r12
184
185 lwz r12, 132(sp)
186 mtsrr0 r12
187
188 lwz r12, 136(sp)
189 mtsrr1 r12
190
191 lwz r12, 140(sp)
192 mtlr r12
193
194 lwz r12, 144(sp)
195 mtctr r12
196
197 lwz r12, 148(sp)
198 mtxer r12
199
200 lwz r12, 156(sp)
201 lwz sp, 160(sp)
202
203 rfi
204
205memsetb:
206 b _memsetb
207
208memcpy:
209memcpy_from_uspace:
210memcpy_to_uspace:
211
212 srwi. r7, r5, 3
213 addi r6, r3, -4
214 addi r4, r4, -4
215 beq 2f
216
217 andi. r0, r6, 3
218 mtctr r7
219 bne 5f
220
221 1:
222
223 lwz r7, 4(r4)
224 lwzu r8, 8(r4)
225 stw r7, 4(r6)
226 stwu r8, 8(r6)
227 bdnz 1b
228
229 andi. r5, r5, 7
230
231 2:
232
233 cmplwi 0, r5, 4
234 blt 3f
235
236 lwzu r0, 4(r4)
237 addi r5, r5, -4
238 stwu r0, 4(r6)
239
240 3:
241
242 cmpwi 0, r5, 0
243 beqlr
244 mtctr r5
245 addi r4, r4, 3
246 addi r6, r6, 3
247
248 4:
249
250 lbzu r0, 1(r4)
251 stbu r0, 1(r6)
252 bdnz 4b
253 blr
254
255 5:
256
257 subfic r0, r0, 4
258 mtctr r0
259
260 6:
261
262 lbz r7, 4(r4)
263 addi r4, r4, 1
264 stb r7, 4(r6)
265 addi r6, r6, 1
266 bdnz 6b
267 subf r5, r0, r5
268 rlwinm. r7, r5, 32-3, 3, 31
269 beq 2b
270 mtctr r7
271 b 1b
272
273memcpy_from_uspace_failover_address:
274memcpy_to_uspace_failover_address:
275 # return zero, failure
276 xor r3, r3, r3
277 blr
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