source: mainline/kernel/arch/ppc32/src/asm.S@ 080ad7f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 080ad7f was b60c582, checked in by Martin Decky <martin@…>, 17 years ago

update for string changes
  • Property mode set to 100644
File size: 4.5 KB
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1#
2# Copyright (c) 2005 Martin Decky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <arch/asm/regname.h>
30
31.text
32
33.global userspace_asm
34.global iret
35.global iret_syscall
36.global memsetb
37.global memsetw
38.global memcpy
39.global memcpy_from_uspace
40.global memcpy_to_uspace
41.global memcpy_from_uspace_failover_address
42.global memcpy_to_uspace_failover_address
43
44userspace_asm:
45
46 # r3 = uspace_uarg
47 # r4 = stack
48 # r5 = entry
49
50 # disable interrupts
51
52 mfmsr r31
53 rlwinm r31, r31, 0, 17, 15
54 mtmsr r31
55
56 # set entry point
57
58 mtsrr0 r5
59
60 # set problem state, enable interrupts
61
62 ori r31, r31, msr_pr
63 ori r31, r31, msr_ee
64 mtsrr1 r31
65
66 # set stack
67
68 mr sp, r4
69
70 # %r6 is defined to hold pcb_ptr - set it to 0
71
72 xor r6, r6, r6
73
74 # jump to userspace
75
76 rfi
77
78iret:
79
80 # disable interrupts
81
82 mfmsr r31
83 rlwinm r31, r31, 0, 17, 15
84 mtmsr r31
85
86 lwz r0, 8(sp)
87 lwz r2, 12(sp)
88 lwz r3, 16(sp)
89 lwz r4, 20(sp)
90 lwz r5, 24(sp)
91 lwz r6, 28(sp)
92 lwz r7, 32(sp)
93 lwz r8, 36(sp)
94 lwz r9, 40(sp)
95 lwz r10, 44(sp)
96 lwz r11, 48(sp)
97 lwz r13, 52(sp)
98 lwz r14, 56(sp)
99 lwz r15, 60(sp)
100 lwz r16, 64(sp)
101 lwz r17, 68(sp)
102 lwz r18, 72(sp)
103 lwz r19, 76(sp)
104 lwz r20, 80(sp)
105 lwz r21, 84(sp)
106 lwz r22, 88(sp)
107 lwz r23, 92(sp)
108 lwz r24, 96(sp)
109 lwz r25, 100(sp)
110 lwz r26, 104(sp)
111 lwz r27, 108(sp)
112 lwz r28, 112(sp)
113 lwz r29, 116(sp)
114 lwz r30, 120(sp)
115 lwz r31, 124(sp)
116
117 lwz r12, 128(sp)
118 mtcr r12
119
120 lwz r12, 132(sp)
121 mtsrr0 r12
122
123 lwz r12, 136(sp)
124 mtsrr1 r12
125
126 lwz r12, 140(sp)
127 mtlr r12
128
129 lwz r12, 144(sp)
130 mtctr r12
131
132 lwz r12, 148(sp)
133 mtxer r12
134
135 lwz r12, 156(sp)
136 lwz sp, 160(sp)
137
138 rfi
139
140iret_syscall:
141
142 # reset decrementer
143
144 li r31, 1000
145 mtdec r31
146
147 # disable interrupts
148
149 mfmsr r31
150 rlwinm r31, r31, 0, 17, 15
151 mtmsr r31
152
153 lwz r0, 8(sp)
154 lwz r2, 12(sp)
155 lwz r4, 20(sp)
156 lwz r5, 24(sp)
157 lwz r6, 28(sp)
158 lwz r7, 32(sp)
159 lwz r8, 36(sp)
160 lwz r9, 40(sp)
161 lwz r10, 44(sp)
162 lwz r11, 48(sp)
163 lwz r13, 52(sp)
164 lwz r14, 56(sp)
165 lwz r15, 60(sp)
166 lwz r16, 64(sp)
167 lwz r17, 68(sp)
168 lwz r18, 72(sp)
169 lwz r19, 76(sp)
170 lwz r20, 80(sp)
171 lwz r21, 84(sp)
172 lwz r22, 88(sp)
173 lwz r23, 92(sp)
174 lwz r24, 96(sp)
175 lwz r25, 100(sp)
176 lwz r26, 104(sp)
177 lwz r27, 108(sp)
178 lwz r28, 112(sp)
179 lwz r29, 116(sp)
180 lwz r30, 120(sp)
181 lwz r31, 124(sp)
182
183 lwz r12, 128(sp)
184 mtcr r12
185
186 lwz r12, 132(sp)
187 mtsrr0 r12
188
189 lwz r12, 136(sp)
190 mtsrr1 r12
191
192 lwz r12, 140(sp)
193 mtlr r12
194
195 lwz r12, 144(sp)
196 mtctr r12
197
198 lwz r12, 148(sp)
199 mtxer r12
200
201 lwz r12, 156(sp)
202 lwz sp, 160(sp)
203
204 rfi
205
206memsetb:
207 b _memsetb
208
209memsetw:
210 b _memsetw
211
212memcpy:
213memcpy_from_uspace:
214memcpy_to_uspace:
215
216 srwi. r7, r5, 3
217 addi r6, r3, -4
218 addi r4, r4, -4
219 beq 2f
220
221 andi. r0, r6, 3
222 mtctr r7
223 bne 5f
224
225 1:
226
227 lwz r7, 4(r4)
228 lwzu r8, 8(r4)
229 stw r7, 4(r6)
230 stwu r8, 8(r6)
231 bdnz 1b
232
233 andi. r5, r5, 7
234
235 2:
236
237 cmplwi 0, r5, 4
238 blt 3f
239
240 lwzu r0, 4(r4)
241 addi r5, r5, -4
242 stwu r0, 4(r6)
243
244 3:
245
246 cmpwi 0, r5, 0
247 beqlr
248 mtctr r5
249 addi r4, r4, 3
250 addi r6, r6, 3
251
252 4:
253
254 lbzu r0, 1(r4)
255 stbu r0, 1(r6)
256 bdnz 4b
257 blr
258
259 5:
260
261 subfic r0, r0, 4
262 mtctr r0
263
264 6:
265
266 lbz r7, 4(r4)
267 addi r4, r4, 1
268 stb r7, 4(r6)
269 addi r6, r6, 1
270 bdnz 6b
271 subf r5, r0, r5
272 rlwinm. r7, r5, 32-3, 3, 31
273 beq 2b
274 mtctr r7
275 b 1b
276
277memcpy_from_uspace_failover_address:
278memcpy_to_uspace_failover_address:
279 # return zero, failure
280 xor r3, r3, r3
281 blr
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