source: mainline/kernel/arch/ppc32/include/mm/page.h@ e54fb21

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since e54fb21 was d0485c6, checked in by Jakub Jermar <jakub@…>, 19 years ago

Introduce page colors. So far, only sparc64 uses correct page color bits. Other architectures have a dummy define
specifying zero bits for a page color.

There is a new check of page color in as_area_share(). Because of lack of support for this in the userspace, the
check has been #ifef'ed out.

  • Property mode set to 100644
File size: 4.4 KB
Line 
1/*
2 * Copyright (C) 2005 Martin Decky
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ppc32mm
30 * @{
31 */
32/** @file
33 */
34
35#ifndef __ppc32_PAGE_H__
36#define __ppc32_PAGE_H__
37
38#include <arch/mm/frame.h>
39
40#define PAGE_WIDTH FRAME_WIDTH
41#define PAGE_SIZE FRAME_SIZE
42
43#define PAGE_COLOR_BITS 0 /* dummy */
44
45#ifdef KERNEL
46
47#ifndef __ASM__
48# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
49# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
50#else
51# define KA2PA(x) ((x) - 0x80000000)
52# define PA2KA(x) ((x) + 0x80000000)
53#endif
54
55/*
56 * Implementation of generic 4-level page table interface,
57 * the hardware Page Hash Table is used as cache.
58 *
59 * Page table layout:
60 * - 32-bit virtual addressess
61 * - Offset is 12 bits => pages are 4K long
62 * - PTL0 has 1024 entries (10 bits)
63 * - PTL1 is not used
64 * - PTL2 is not used
65 * - PLT3 has 1024 entries (10 bits)
66 */
67
68#define PTL0_ENTRIES_ARCH 1024
69#define PTL1_ENTRIES_ARCH 0
70#define PTL2_ENTRIES_ARCH 0
71#define PTL3_ENTRIES_ARCH 1024
72
73#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
74#define PTL1_INDEX_ARCH(vaddr) 0
75#define PTL2_INDEX_ARCH(vaddr) 0
76#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)
77
78#define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *) (ptl0))[(i)].pfn << 12)
79#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)
80#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)
81#define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *) (ptl3))[(i)].pfn << 12)
82
83#define SET_PTL0_ADDRESS_ARCH(ptl0)
84#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12)
85#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
86#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
87#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12)
88
89#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *) (ptl0), (index_t) (i))
90#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT
91#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT
92#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *) (ptl3), (index_t) (i))
93
94#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x))
95#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
96#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
97#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x))
98
99#define PTE_VALID_ARCH(pte) (*((uint32_t *) (pte)) != 0)
100#define PTE_PRESENT_ARCH(pte) ((pte)->p != 0)
101#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn << 12)
102#define PTE_WRITABLE_ARCH(pte) 1
103#define PTE_EXECUTABLE_ARCH(pte) 1
104
105#ifndef __ASM__
106
107#include <mm/page.h>
108#include <arch/mm/frame.h>
109#include <arch/types.h>
110
111static inline int get_pt_flags(pte_t *pt, index_t i)
112{
113 pte_t *p = &pt[i];
114
115 return (
116 (1 << PAGE_CACHEABLE_SHIFT) |
117 ((!p->p) << PAGE_PRESENT_SHIFT) |
118 (1 << PAGE_USER_SHIFT) |
119 (1 << PAGE_READ_SHIFT) |
120 (1 << PAGE_WRITE_SHIFT) |
121 (1 << PAGE_EXEC_SHIFT) |
122 (p->g << PAGE_GLOBAL_SHIFT)
123 );
124}
125
126static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
127{
128 pte_t *p = &pt[i];
129
130 p->p = !(flags & PAGE_NOT_PRESENT);
131 p->g = (flags & PAGE_GLOBAL) != 0;
132 p->valid = 1;
133}
134
135extern void page_arch_init(void);
136
137#endif /* __ASM__ */
138
139#endif /* KERNEL */
140
141#endif
142
143/** @}
144 */
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