source: mainline/kernel/arch/ppc32/include/atomic.h@ 402de0c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 402de0c was df4ed85, checked in by Jakub Jermar <jakub@…>, 19 years ago

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[0ca6faa]1/*
[df4ed85]2 * Copyright (c) 2005 Martin Decky
[747a2476]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[0ca6faa]28
[06e1e95]29/** @addtogroup ppc32
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[06e1e95]35#ifndef KERN_ppc32_ATOMIC_H_
36#define KERN_ppc32_ATOMIC_H_
[0ca6faa]37
[51cc6bf6]38static inline void atomic_inc(atomic_t *val)
39{
[d2ab461]40 long tmp;
[e4ddfa8]41
[762a824]42 asm volatile (
[e4ddfa8]43 "1:\n"
44 "lwarx %0, 0, %2\n"
45 "addic %0, %0, 1\n"
46 "stwcx. %0, 0, %2\n"
47 "bne- 1b"
48 : "=&r" (tmp), "=m" (val->count)
49 : "r" (&val->count), "m" (val->count)
[762a824]50 : "cc"
51 );
[0ca6faa]52}
53
[51cc6bf6]54static inline void atomic_dec(atomic_t *val)
55{
[d2ab461]56 long tmp;
[e4ddfa8]57
[762a824]58 asm volatile (
[e4ddfa8]59 "1:\n"
60 "lwarx %0, 0, %2\n"
61 "addic %0, %0, -1\n"
62 "stwcx. %0, 0, %2\n"
63 "bne- 1b"
64 : "=&r" (tmp), "=m" (val->count)
65 : "r" (&val->count), "m" (val->count)
[762a824]66 : "cc"
67 );
[80d2bdb]68}
69
[23684b7]70static inline long atomic_postinc(atomic_t *val)
[51cc6bf6]71{
72 atomic_inc(val);
73 return val->count - 1;
74}
75
[23684b7]76static inline long atomic_postdec(atomic_t *val)
[51cc6bf6]77{
78 atomic_dec(val);
79 return val->count + 1;
80}
81
[23684b7]82static inline long atomic_preinc(atomic_t *val)
[51cc6bf6]83{
84 atomic_inc(val);
85 return val->count;
86}
87
[23684b7]88static inline long atomic_predec(atomic_t *val)
[51cc6bf6]89{
90 atomic_dec(val);
91 return val->count;
92}
93
[04b1b8a]94#endif
[b45c443]95
[06e1e95]96/** @}
[b45c443]97 */
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