| 1 | #
|
|---|
| 2 | # Copyright (c) 2003-2004 Jakub Jermar
|
|---|
| 3 | # All rights reserved.
|
|---|
| 4 | #
|
|---|
| 5 | # Redistribution and use in source and binary forms, with or without
|
|---|
| 6 | # modification, are permitted provided that the following conditions
|
|---|
| 7 | # are met:
|
|---|
| 8 | #
|
|---|
| 9 | # - Redistributions of source code must retain the above copyright
|
|---|
| 10 | # notice, this list of conditions and the following disclaimer.
|
|---|
| 11 | # - Redistributions in binary form must reproduce the above copyright
|
|---|
| 12 | # notice, this list of conditions and the following disclaimer in the
|
|---|
| 13 | # documentation and/or other materials provided with the distribution.
|
|---|
| 14 | # - The name of the author may not be used to endorse or promote products
|
|---|
| 15 | # derived from this software without specific prior written permission.
|
|---|
| 16 | #
|
|---|
| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
|---|
| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
|---|
| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
|---|
| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|---|
| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
|---|
| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|---|
| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|---|
| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|---|
| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
|---|
| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|---|
| 27 | #
|
|---|
| 28 |
|
|---|
| 29 | #include <arch/asm/regname.h>
|
|---|
| 30 | #include <arch/mm/page.h>
|
|---|
| 31 | #include <arch/asm/boot.h>
|
|---|
| 32 | #include <arch/context_offset.h>
|
|---|
| 33 | #include <arch/stack.h>
|
|---|
| 34 |
|
|---|
| 35 | .text
|
|---|
| 36 |
|
|---|
| 37 | .set noat
|
|---|
| 38 | .set noreorder
|
|---|
| 39 | .set nomacro
|
|---|
| 40 |
|
|---|
| 41 | .global kernel_image_start
|
|---|
| 42 | .global tlb_refill_entry
|
|---|
| 43 | .global cache_error_entry
|
|---|
| 44 | .global exception_entry
|
|---|
| 45 | .global userspace_asm
|
|---|
| 46 |
|
|---|
| 47 | /*
|
|---|
| 48 | * Which status bits are thread-local:
|
|---|
| 49 | * KSU(UM), EXL, ERL, IE
|
|---|
| 50 | */
|
|---|
| 51 | #define REG_SAVE_MASK 0x1f
|
|---|
| 52 |
|
|---|
| 53 | #define ISTATE_OFFSET_A0 0
|
|---|
| 54 | #define ISTATE_OFFSET_A1 8
|
|---|
| 55 | #define ISTATE_OFFSET_A2 16
|
|---|
| 56 | #define ISTATE_OFFSET_A3 24
|
|---|
| 57 | #define ISTATE_OFFSET_T0 32
|
|---|
| 58 | #define ISTATE_OFFSET_T1 40
|
|---|
| 59 | #define ISTATE_OFFSET_V0 48
|
|---|
| 60 | #define ISTATE_OFFSET_V1 56
|
|---|
| 61 | #define ISTATE_OFFSET_AT 64
|
|---|
| 62 | #define ISTATE_OFFSET_T2 72
|
|---|
| 63 | #define ISTATE_OFFSET_T3 80
|
|---|
| 64 | #define ISTATE_OFFSET_T4 88
|
|---|
| 65 | #define ISTATE_OFFSET_T5 96
|
|---|
| 66 | #define ISTATE_OFFSET_T6 104
|
|---|
| 67 | #define ISTATE_OFFSET_T7 112
|
|---|
| 68 | #define ISTATE_OFFSET_S0 120
|
|---|
| 69 | #define ISTATE_OFFSET_S1 128
|
|---|
| 70 | #define ISTATE_OFFSET_S2 136
|
|---|
| 71 | #define ISTATE_OFFSET_S3 144
|
|---|
| 72 | #define ISTATE_OFFSET_S4 152
|
|---|
| 73 | #define ISTATE_OFFSET_S5 160
|
|---|
| 74 | #define ISTATE_OFFSET_S6 168
|
|---|
| 75 | #define ISTATE_OFFSET_S7 176
|
|---|
| 76 | #define ISTATE_OFFSET_T8 184
|
|---|
| 77 | #define ISTATE_OFFSET_T9 192
|
|---|
| 78 | #define ISTATE_OFFSET_KT0 200
|
|---|
| 79 | #define ISTATE_OFFSET_KT1 208
|
|---|
| 80 | #define ISTATE_OFFSET_GP 216
|
|---|
| 81 | #define ISTATE_OFFSET_SP 224
|
|---|
| 82 | #define ISTATE_OFFSET_S8 232
|
|---|
| 83 | #define ISTATE_OFFSET_RA 240
|
|---|
| 84 | #define ISTATE_OFFSET_LO 248
|
|---|
| 85 | #define ISTATE_OFFSET_HI 252
|
|---|
| 86 | #define ISTATE_OFFSET_STATUS 256
|
|---|
| 87 | #define ISTATE_OFFSET_EPC 264
|
|---|
| 88 | #define ISTATE_OFFSET_ALIGNMENT 272
|
|---|
| 89 |
|
|---|
| 90 | #define ISTATE_SOFT_SIZE 280
|
|---|
| 91 |
|
|---|
| 92 | /*
|
|---|
| 93 | * The fake ABI prologue is never executed and may not be part of the
|
|---|
| 94 | * procedure's body. Instead, it should be immediately preceding the procedure's
|
|---|
| 95 | * body. Its only purpose is to trick the stack trace walker into thinking that
|
|---|
| 96 | * the exception is more or less just a normal function call.
|
|---|
| 97 | */
|
|---|
| 98 | .macro FAKE_ABI_PROLOGUE
|
|---|
| 99 | sub $sp, ISTATE_SOFT_SIZE
|
|---|
| 100 | sd $ra, ISTATE_OFFSET_EPC($sp)
|
|---|
| 101 | .endm
|
|---|
| 102 |
|
|---|
| 103 | /*
|
|---|
| 104 | * Save registers to space defined by \r
|
|---|
| 105 | * We will change status: Disable ERL, EXL, UM, IE
|
|---|
| 106 | * These changes will be automatically reversed in REGISTER_LOAD
|
|---|
| 107 | * %sp is NOT saved as part of these registers
|
|---|
| 108 | */
|
|---|
| 109 | .macro REGISTERS_STORE_AND_EXC_RESET r
|
|---|
| 110 | sd $at, ISTATE_OFFSET_AT(\r)
|
|---|
| 111 | sd $v0, ISTATE_OFFSET_V0(\r)
|
|---|
| 112 | sd $v1, ISTATE_OFFSET_V1(\r)
|
|---|
| 113 | sd $a0, ISTATE_OFFSET_A0(\r)
|
|---|
| 114 | sd $a1, ISTATE_OFFSET_A1(\r)
|
|---|
| 115 | sd $a2, ISTATE_OFFSET_A2(\r)
|
|---|
| 116 | sd $a3, ISTATE_OFFSET_A3(\r)
|
|---|
| 117 | sd $t0, ISTATE_OFFSET_T0(\r)
|
|---|
| 118 | sd $t1, ISTATE_OFFSET_T1(\r)
|
|---|
| 119 | sd $t2, ISTATE_OFFSET_T2(\r)
|
|---|
| 120 | sd $t3, ISTATE_OFFSET_T3(\r)
|
|---|
| 121 | sd $t4, ISTATE_OFFSET_T4(\r)
|
|---|
| 122 | sd $t5, ISTATE_OFFSET_T5(\r)
|
|---|
| 123 | sd $t6, ISTATE_OFFSET_T6(\r)
|
|---|
| 124 | sd $t7, ISTATE_OFFSET_T7(\r)
|
|---|
| 125 | sd $t8, ISTATE_OFFSET_T8(\r)
|
|---|
| 126 | sd $t9, ISTATE_OFFSET_T9(\r)
|
|---|
| 127 | sd $s0, ISTATE_OFFSET_S0(\r)
|
|---|
| 128 | sd $s1, ISTATE_OFFSET_S1(\r)
|
|---|
| 129 | sd $s2, ISTATE_OFFSET_S2(\r)
|
|---|
| 130 | sd $s3, ISTATE_OFFSET_S3(\r)
|
|---|
| 131 | sd $s4, ISTATE_OFFSET_S4(\r)
|
|---|
| 132 | sd $s5, ISTATE_OFFSET_S5(\r)
|
|---|
| 133 | sd $s6, ISTATE_OFFSET_S6(\r)
|
|---|
| 134 | sd $s7, ISTATE_OFFSET_S7(\r)
|
|---|
| 135 | sd $s8, ISTATE_OFFSET_S8(\r)
|
|---|
| 136 |
|
|---|
| 137 | mflo $at
|
|---|
| 138 | sw $at, ISTATE_OFFSET_LO(\r)
|
|---|
| 139 | mfhi $at
|
|---|
| 140 | sw $at, ISTATE_OFFSET_HI(\r)
|
|---|
| 141 |
|
|---|
| 142 | sd $gp, ISTATE_OFFSET_GP(\r)
|
|---|
| 143 | sd $ra, ISTATE_OFFSET_RA(\r)
|
|---|
| 144 | sd $k0, ISTATE_OFFSET_KT0(\r)
|
|---|
| 145 | sd $k1, ISTATE_OFFSET_KT1(\r)
|
|---|
| 146 |
|
|---|
| 147 | dmfc0 $t0, $status
|
|---|
| 148 | dmfc0 $t1, $epc
|
|---|
| 149 |
|
|---|
| 150 | /* save only KSU, EXL, ERL, IE */
|
|---|
| 151 | and $t2, $t0, REG_SAVE_MASK
|
|---|
| 152 |
|
|---|
| 153 | /* clear KSU, EXL, ERL, IE */
|
|---|
| 154 | li $t3, ~(REG_SAVE_MASK)
|
|---|
| 155 | and $t0, $t0, $t3
|
|---|
| 156 |
|
|---|
| 157 | sd $t2, ISTATE_OFFSET_STATUS(\r)
|
|---|
| 158 | sd $t1, ISTATE_OFFSET_EPC(\r)
|
|---|
| 159 | dmtc0 $t0, $status
|
|---|
| 160 | .endm
|
|---|
| 161 |
|
|---|
| 162 | .macro REGISTERS_LOAD r
|
|---|
| 163 | /*
|
|---|
| 164 | * Update only UM, EXR, IE from status, the rest
|
|---|
| 165 | * is controlled by OS and not bound to task.
|
|---|
| 166 | */
|
|---|
| 167 | dmfc0 $t0, $status
|
|---|
| 168 | ld $t1, ISTATE_OFFSET_STATUS(\r)
|
|---|
| 169 |
|
|---|
| 170 | /* mask UM, EXL, ERL, IE */
|
|---|
| 171 | li $t2, ~REG_SAVE_MASK
|
|---|
| 172 | and $t0, $t0, $t2
|
|---|
| 173 |
|
|---|
| 174 | /* copy UM, EXL, ERL, IE from saved status */
|
|---|
| 175 | or $t0, $t0, $t1
|
|---|
| 176 | dmtc0 $t0, $status
|
|---|
| 177 |
|
|---|
| 178 | ld $v0, ISTATE_OFFSET_V0(\r)
|
|---|
| 179 | ld $v1, ISTATE_OFFSET_V1(\r)
|
|---|
| 180 | ld $a0, ISTATE_OFFSET_A0(\r)
|
|---|
| 181 | ld $a1, ISTATE_OFFSET_A1(\r)
|
|---|
| 182 | ld $a2, ISTATE_OFFSET_A2(\r)
|
|---|
| 183 | ld $a3, ISTATE_OFFSET_A3(\r)
|
|---|
| 184 | ld $t0, ISTATE_OFFSET_T0(\r)
|
|---|
| 185 | ld $t1, ISTATE_OFFSET_T1(\r)
|
|---|
| 186 | ld $t2, ISTATE_OFFSET_T2(\r)
|
|---|
| 187 | ld $t3, ISTATE_OFFSET_T3(\r)
|
|---|
| 188 | ld $t4, ISTATE_OFFSET_T4(\r)
|
|---|
| 189 | ld $t5, ISTATE_OFFSET_T5(\r)
|
|---|
| 190 | ld $t6, ISTATE_OFFSET_T6(\r)
|
|---|
| 191 | ld $t7, ISTATE_OFFSET_T7(\r)
|
|---|
| 192 | ld $t8, ISTATE_OFFSET_T8(\r)
|
|---|
| 193 | ld $t9, ISTATE_OFFSET_T9(\r)
|
|---|
| 194 |
|
|---|
| 195 | ld $gp, ISTATE_OFFSET_GP(\r)
|
|---|
| 196 | ld $ra, ISTATE_OFFSET_RA(\r)
|
|---|
| 197 | ld $k1, ISTATE_OFFSET_KT1(\r)
|
|---|
| 198 |
|
|---|
| 199 | lw $at, ISTATE_OFFSET_LO(\r)
|
|---|
| 200 | mtlo $at
|
|---|
| 201 | lw $at, ISTATE_OFFSET_HI(\r)
|
|---|
| 202 | mthi $at
|
|---|
| 203 |
|
|---|
| 204 | ld $at, ISTATE_OFFSET_EPC(\r)
|
|---|
| 205 | dmtc0 $at, $epc
|
|---|
| 206 |
|
|---|
| 207 | ld $at, ISTATE_OFFSET_AT(\r)
|
|---|
| 208 | ld $sp, ISTATE_OFFSET_SP(\r)
|
|---|
| 209 | .endm
|
|---|
| 210 |
|
|---|
| 211 | /*
|
|---|
| 212 | * Move kernel stack pointer address to register $k0.
|
|---|
| 213 | * If we are in user mode, load the appropriate stack address.
|
|---|
| 214 | */
|
|---|
| 215 | .macro KERNEL_STACK_TO_K0
|
|---|
| 216 | /* if we are in user mode */
|
|---|
| 217 | dmfc0 $k0, $status
|
|---|
| 218 | andi $k0, 0x10
|
|---|
| 219 |
|
|---|
| 220 | beq $k0, $0, 1f
|
|---|
| 221 | move $k0, $sp
|
|---|
| 222 |
|
|---|
| 223 | /* move $k0 pointer to kernel stack */
|
|---|
| 224 | dla $k0, supervisor_sp
|
|---|
| 225 |
|
|---|
| 226 | /* move $k0 (supervisor_sp) */
|
|---|
| 227 | lw $k0, ($k0)
|
|---|
| 228 |
|
|---|
| 229 | 1:
|
|---|
| 230 | .endm
|
|---|
| 231 |
|
|---|
| 232 | .org 0x0
|
|---|
| 233 | kernel_image_start:
|
|---|
| 234 | /* load temporary stack */
|
|---|
| 235 | lui $sp, %hi(end_stack)
|
|---|
| 236 | ori $sp, $sp, %lo(end_stack)
|
|---|
| 237 |
|
|---|
| 238 | /* not sure about this, but might be needed for PIC code */
|
|---|
| 239 | lui $gp, 0x8000
|
|---|
| 240 |
|
|---|
| 241 | /* $a1 contains physical address of bootinfo_t */
|
|---|
| 242 | jal arch_pre_main
|
|---|
| 243 | nop
|
|---|
| 244 |
|
|---|
| 245 | j main_bsp
|
|---|
| 246 | nop
|
|---|
| 247 |
|
|---|
| 248 | .space TEMP_STACK_SIZE
|
|---|
| 249 | end_stack:
|
|---|
| 250 |
|
|---|
| 251 | tlb_refill_entry:
|
|---|
| 252 | j tlb_refill_handler
|
|---|
| 253 | nop
|
|---|
| 254 |
|
|---|
| 255 | cache_error_entry:
|
|---|
| 256 | j cache_error_handler
|
|---|
| 257 | nop
|
|---|
| 258 |
|
|---|
| 259 | exception_entry:
|
|---|
| 260 | j exception_handler
|
|---|
| 261 | nop
|
|---|
| 262 |
|
|---|
| 263 | FAKE_ABI_PROLOGUE
|
|---|
| 264 | exception_handler:
|
|---|
| 265 | KERNEL_STACK_TO_K0
|
|---|
| 266 |
|
|---|
| 267 | sub $k0, ISTATE_SOFT_SIZE
|
|---|
| 268 | sw $sp, ISTATE_OFFSET_SP($k0)
|
|---|
| 269 | move $sp, $k0
|
|---|
| 270 |
|
|---|
| 271 | mfc0 $k0, $cause
|
|---|
| 272 |
|
|---|
| 273 | sra $k0, $k0, 0x2 /* cp0_exc_cause() part 1 */
|
|---|
| 274 | andi $k0, $k0, 0x1f /* cp0_exc_cause() part 2 */
|
|---|
| 275 | sub $k0, 8 /* 8 = SYSCALL */
|
|---|
| 276 |
|
|---|
| 277 | beqz $k0, syscall_shortcut
|
|---|
| 278 | add $k0, 8 /* revert $k0 back to correct exc number */
|
|---|
| 279 |
|
|---|
| 280 | REGISTERS_STORE_AND_EXC_RESET $sp
|
|---|
| 281 |
|
|---|
| 282 | move $a1, $sp
|
|---|
| 283 | jal exc_dispatch /* exc_dispatch(excno, register_space) */
|
|---|
| 284 | move $a0, $k0
|
|---|
| 285 |
|
|---|
| 286 | REGISTERS_LOAD $sp
|
|---|
| 287 | /* the $sp is automatically restored to former value */
|
|---|
| 288 | eret
|
|---|
| 289 |
|
|---|
| 290 | /** Syscall entry
|
|---|
| 291 | *
|
|---|
| 292 | * Registers:
|
|---|
| 293 | *
|
|---|
| 294 | * @param $v0 Syscall number.
|
|---|
| 295 | * @param $a0 1st argument.
|
|---|
| 296 | * @param $a1 2nd argument.
|
|---|
| 297 | * @param $a2 3rd argument.
|
|---|
| 298 | * @param $a3 4th argument.
|
|---|
| 299 | * @param $t0 5th argument.
|
|---|
| 300 | * @param $t1 6th argument.
|
|---|
| 301 | *
|
|---|
| 302 | * @return The return value will be stored in $v0.
|
|---|
| 303 | *
|
|---|
| 304 | */
|
|---|
| 305 | syscall_shortcut:
|
|---|
| 306 | mfc0 $t3, $epc
|
|---|
| 307 | mfc0 $t2, $status
|
|---|
| 308 | sw $t3, ISTATE_OFFSET_EPC($sp) /* save EPC */
|
|---|
| 309 | sw $k1, ISTATE_OFFSET_KT1($sp) /* save $k1 not saved on context switch */
|
|---|
| 310 |
|
|---|
| 311 | and $t4, $t2, REG_SAVE_MASK /* save only KSU, EXL, ERL, IE */
|
|---|
| 312 | li $t5, ~(0x1f)
|
|---|
| 313 | and $t2, $t2, $t5 /* clear KSU, EXL, ERL */
|
|---|
| 314 | ori $t2, $t2, 0x1 /* set IE */
|
|---|
| 315 |
|
|---|
| 316 | sw $t4, ISTATE_OFFSET_STATUS($sp)
|
|---|
| 317 | mtc0 $t2, $status
|
|---|
| 318 |
|
|---|
| 319 | /*
|
|---|
| 320 | * Call the higher level system call handler.
|
|---|
| 321 | *
|
|---|
| 322 | */
|
|---|
| 323 | sw $t0, ISTATE_OFFSET_T0($sp) /* save the 5th argument on the stack */
|
|---|
| 324 | sw $t1, ISTATE_OFFSET_T1($sp) /* save the 6th argument on the stack */
|
|---|
| 325 | jal syscall_handler
|
|---|
| 326 | sw $v0, ISTATE_OFFSET_V0($sp) /* save the syscall number on the stack */
|
|---|
| 327 |
|
|---|
| 328 | /* restore status */
|
|---|
| 329 | mfc0 $t2, $status
|
|---|
| 330 | lw $t3, ISTATE_OFFSET_STATUS($sp)
|
|---|
| 331 |
|
|---|
| 332 | /*
|
|---|
| 333 | * Change back to EXL = 1 (from last exception), otherwise
|
|---|
| 334 | * an interrupt could rewrite the CP0 - EPC.
|
|---|
| 335 | *
|
|---|
| 336 | */
|
|---|
| 337 | li $t4, ~REG_SAVE_MASK /* mask UM, EXL, ERL, IE */
|
|---|
| 338 | and $t2, $t2, $t4
|
|---|
| 339 | or $t2, $t2, $t3 /* copy saved UM, EXL, ERL, IE */
|
|---|
| 340 | mtc0 $t2, $status
|
|---|
| 341 |
|
|---|
| 342 | /* restore epc + 4 */
|
|---|
| 343 | lw $t2, ISTATE_OFFSET_EPC($sp)
|
|---|
| 344 | lw $k1, ISTATE_OFFSET_KT1($sp)
|
|---|
| 345 | addi $t2, $t2, 4
|
|---|
| 346 | mtc0 $t2, $epc
|
|---|
| 347 |
|
|---|
| 348 | lw $sp, ISTATE_OFFSET_SP($sp) /* restore $sp */
|
|---|
| 349 | eret
|
|---|
| 350 |
|
|---|
| 351 | FAKE_ABI_PROLOGUE
|
|---|
| 352 | tlb_refill_handler:
|
|---|
| 353 | KERNEL_STACK_TO_K0
|
|---|
| 354 | sub $k0, ISTATE_SOFT_SIZE
|
|---|
| 355 | REGISTERS_STORE_AND_EXC_RESET $k0
|
|---|
| 356 | sw $sp, ISTATE_OFFSET_SP($k0)
|
|---|
| 357 | move $sp, $k0
|
|---|
| 358 |
|
|---|
| 359 | jal tlb_refill
|
|---|
| 360 | move $a0, $sp
|
|---|
| 361 |
|
|---|
| 362 | REGISTERS_LOAD $sp
|
|---|
| 363 | eret
|
|---|
| 364 |
|
|---|
| 365 | FAKE_ABI_PROLOGUE
|
|---|
| 366 | cache_error_handler:
|
|---|
| 367 | KERNEL_STACK_TO_K0
|
|---|
| 368 | sub $k0, ISTATE_SOFT_SIZE
|
|---|
| 369 | REGISTERS_STORE_AND_EXC_RESET $k0
|
|---|
| 370 | sw $sp, ISTATE_OFFSET_SP($k0)
|
|---|
| 371 | move $sp, $k0
|
|---|
| 372 |
|
|---|
| 373 | jal cache_error
|
|---|
| 374 | move $a0, $sp
|
|---|
| 375 |
|
|---|
| 376 | REGISTERS_LOAD $sp
|
|---|
| 377 | eret
|
|---|
| 378 |
|
|---|
| 379 | userspace_asm:
|
|---|
| 380 | move $sp, $a0
|
|---|
| 381 | move $v0, $a1
|
|---|
| 382 | move $t9, $a2 /* set up correct entry into PIC code */
|
|---|
| 383 | xor $a0, $a0, $a0 /* $a0 is defined to hold pcb_ptr */
|
|---|
| 384 | /* set it to 0 */
|
|---|
| 385 | eret
|
|---|
