source: mainline/kernel/arch/mips64/src/mm/frame.c@ ddcc8a0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ddcc8a0 was ddcc8a0, checked in by Jakub Jermar <jakub@…>, 14 years ago

Split frame_arch_init() into two parts.

  • frame_low_arch_init() is meant to initialize physical memory that will be accessible using the kernel identity mapping
  • frame_high_arch_init() is meant to initialize physical memory beyond the reach of the kernel identity mapping; zones in the high memory should have configuration frames allocated externally from the low memory (which will be allowed)
  • Property mode set to 100644
File size: 6.4 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup mips64mm
30 * @{
31 */
32/** @file
33 */
34
35#include <macros.h>
36#include <arch/mm/frame.h>
37#include <arch/mm/tlb.h>
38#include <interrupt.h>
39#include <mm/frame.h>
40#include <mm/asid.h>
41#include <config.h>
42#include <arch/drivers/msim.h>
43#include <print.h>
44
45#define ZERO_PAGE_MASK TLB_PAGE_MASK_256K
46#define ZERO_FRAMES 2048
47#define ZERO_PAGE_WIDTH 18 /* 256K */
48#define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)
49#define ZERO_PAGE_ASID ASID_INVALID
50#define ZERO_PAGE_TLBI 0
51#define ZERO_PAGE_ADDR 0
52#define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
53#define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
54
55#define ZERO_PAGE_VALUE_KSEG1(frame) \
56 (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
57
58#define MAX_REGIONS 32
59
60typedef struct {
61 pfn_t start;
62 pfn_t count;
63} phys_region_t;
64
65static size_t phys_regions_count = 0;
66static phys_region_t phys_regions[MAX_REGIONS];
67
68/** Check whether frame is available
69 *
70 * Returns true if given frame is generally available for use.
71 * Returns false if given frame is used for physical memory
72 * mapped devices and cannot be used.
73 *
74 */
75static bool frame_available(pfn_t frame)
76{
77#ifdef MACHINE_msim
78 /* MSIM device (dprinter) */
79 if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
80 return false;
81
82 /* MSIM device (dkeyboard) */
83 if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
84 return false;
85#endif
86
87 return true;
88}
89
90/** Check whether frame is safe to write
91 *
92 * Returns true if given frame is safe for read/write test.
93 * Returns false if given frame should not be touched.
94 *
95 */
96static bool frame_safe(pfn_t frame)
97{
98 /* Kernel structures */
99 if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
100 return false;
101
102 /* Kernel */
103 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
104 KA2PA(config.base), config.kernel_size))
105 return false;
106
107 /* Kernel stack */
108 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
109 KA2PA(config.stack_base), config.stack_size))
110 return false;
111
112 /* Init tasks */
113 bool safe = true;
114 size_t i;
115 for (i = 0; i < init.cnt; i++)
116 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
117 KA2PA(init.tasks[i].addr), init.tasks[i].size)) {
118 safe = false;
119 break;
120 }
121
122 return safe;
123}
124
125static void frame_add_region(pfn_t start_frame, pfn_t end_frame)
126{
127 if (end_frame > start_frame) {
128 /* Convert 1M frames to 16K frames */
129 pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);
130 pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);
131
132 /* Interrupt vector frame is blacklisted */
133 pfn_t conf_frame;
134 if (first == 0)
135 conf_frame = 1;
136 else
137 conf_frame = first;
138
139 zone_create(first, count, conf_frame, 0);
140
141 if (phys_regions_count < MAX_REGIONS) {
142 phys_regions[phys_regions_count].start = first;
143 phys_regions[phys_regions_count].count = count;
144 phys_regions_count++;
145 }
146 }
147}
148
149/** Create memory zones
150 *
151 * Walk through available 256 KB chunks of physical
152 * memory and create zones.
153 *
154 * Note: It is assumed that the TLB is not yet being
155 * used in any way, thus there is no interference.
156 *
157 */
158void frame_low_arch_init(void)
159{
160 ipl_t ipl = interrupts_disable();
161
162 /* Clear and initialize TLB */
163 cp0_pagemask_write(ZERO_PAGE_MASK);
164 cp0_entry_lo0_write(0);
165 cp0_entry_lo1_write(0);
166 cp0_entry_hi_write(0);
167
168 for (size_t i = 0; i < TLB_ENTRY_COUNT; i++) {
169 cp0_index_write(i);
170 tlbwi();
171 }
172
173 pfn_t start_frame = 0;
174 pfn_t frame;
175 bool avail = true;
176
177 /* Walk through all 1 MB frames */
178 for (frame = 0; frame < ZERO_FRAMES; frame++) {
179 if (!frame_available(frame))
180 avail = false;
181 else {
182 if (frame_safe(frame)) {
183 entry_lo_t lo0;
184 entry_lo_t lo1;
185 entry_hi_t hi;
186 tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
187 tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
188 tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
189
190 cp0_pagemask_write(ZERO_PAGE_MASK);
191 cp0_entry_lo0_write(lo0.value);
192 cp0_entry_lo1_write(lo1.value);
193 cp0_entry_hi_write(hi.value);
194 cp0_index_write(ZERO_PAGE_TLBI);
195 tlbwi();
196
197 ZERO_PAGE_VALUE = 0;
198 if (ZERO_PAGE_VALUE != 0)
199 avail = false;
200 else {
201 ZERO_PAGE_VALUE = 0xdeadbeef;
202 if (ZERO_PAGE_VALUE != 0xdeadbeef)
203 avail = false;
204 }
205 }
206 }
207
208 if (!avail) {
209 frame_add_region(start_frame, frame);
210 start_frame = frame + 1;
211 avail = true;
212 }
213 }
214
215 frame_add_region(start_frame, frame);
216
217 /* Blacklist interrupt vector frame */
218 frame_mark_unavailable(0, 1);
219
220 /* Cleanup */
221 cp0_pagemask_write(ZERO_PAGE_MASK);
222 cp0_entry_lo0_write(0);
223 cp0_entry_lo1_write(0);
224 cp0_entry_hi_write(0);
225 cp0_index_write(ZERO_PAGE_TLBI);
226 tlbwi();
227
228 interrupts_restore(ipl);
229}
230
231void frame_high_arch_init(void)
232{
233}
234
235void physmem_print(void)
236{
237 printf("[base ] [size ]\n");
238
239 for (size_t i = 0; i < phys_regions_count; i++) {
240 printf("%#018lx %18lu\n", PFN2ADDR(phys_regions[i].start),
241 PFN2ADDR(phys_regions[i].count));
242 }
243}
244
245/** @}
246 */
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