source: mainline/kernel/arch/mips64/src/mm/frame.c@ 80d9d83

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 80d9d83 was 3c50cddc, checked in by Jakub Jermar <jakub@…>, 13 years ago

Use msim printer and kayboard only for the msim machine.
  • Property mode set to 100644
File size: 6.7 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup mips64mm
30 * @{
31 */
32/** @file
33 */
34
35#include <macros.h>
36#include <arch/mm/frame.h>
37#include <arch/mm/tlb.h>
38#include <interrupt.h>
39#include <mm/frame.h>
40#include <mm/asid.h>
41#include <config.h>
42#ifdef MACHINE_msim
43#include <arch/drivers/msim.h>
44#endif
45#include <print.h>
46
47#define ZERO_PAGE_MASK TLB_PAGE_MASK_256K
48#define ZERO_FRAMES 2048
49#define ZERO_PAGE_WIDTH 18 /* 256K */
50#define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)
51#define ZERO_PAGE_ASID ASID_INVALID
52#define ZERO_PAGE_TLBI 0
53#define ZERO_PAGE_ADDR 0
54#define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
55#define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
56
57#define ZERO_PAGE_VALUE_KSEG1(frame) \
58 (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
59
60#define MAX_REGIONS 32
61
62typedef struct {
63 pfn_t start;
64 pfn_t count;
65} phys_region_t;
66
67static size_t phys_regions_count = 0;
68static phys_region_t phys_regions[MAX_REGIONS];
69
70/** Check whether frame is available
71 *
72 * Returns true if given frame is generally available for use.
73 * Returns false if given frame is used for physical memory
74 * mapped devices and cannot be used.
75 *
76 */
77static bool frame_available(pfn_t frame)
78{
79#ifdef MACHINE_msim
80 /* MSIM device (dprinter) */
81 if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
82 return false;
83
84 /* MSIM device (dkeyboard) */
85 if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
86 return false;
87#endif
88
89 return true;
90}
91
92/** Check whether frame is safe to write
93 *
94 * Returns true if given frame is safe for read/write test.
95 * Returns false if given frame should not be touched.
96 *
97 */
98static bool frame_safe(pfn_t frame)
99{
100 /* Kernel structures */
101 if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
102 return false;
103
104 /* Kernel */
105 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
106 KA2PA(config.base), config.kernel_size))
107 return false;
108
109 /* Kernel stack */
110 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
111 KA2PA(config.stack_base), config.stack_size))
112 return false;
113
114 /* Init tasks */
115 bool safe = true;
116 size_t i;
117 for (i = 0; i < init.cnt; i++)
118 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
119 init.tasks[i].paddr, init.tasks[i].size)) {
120 safe = false;
121 break;
122 }
123
124 return safe;
125}
126
127static void frame_add_region(pfn_t start_frame, pfn_t end_frame, bool low)
128{
129 if (end_frame <= start_frame)
130 return;
131
132 uintptr_t base = start_frame << ZERO_PAGE_WIDTH;
133 size_t size = (end_frame - start_frame) << ZERO_PAGE_WIDTH;
134
135 if (!frame_adjust_zone_bounds(low, &base, &size))
136 return;
137
138 pfn_t first = ADDR2PFN(base);
139 size_t count = SIZE2FRAMES(size);
140 pfn_t conf_frame;
141
142 if (low) {
143 /* Interrupt vector frame is blacklisted */
144 if (first == 0)
145 conf_frame = 1;
146 else
147 conf_frame = first;
148 zone_create(first, count, conf_frame,
149 ZONE_AVAILABLE | ZONE_LOWMEM);
150 } else {
151 conf_frame = zone_external_conf_alloc(count);
152 if (conf_frame != 0)
153 zone_create(first, count, conf_frame,
154 ZONE_AVAILABLE | ZONE_HIGHMEM);
155 }
156
157 if (phys_regions_count < MAX_REGIONS) {
158 phys_regions[phys_regions_count].start = first;
159 phys_regions[phys_regions_count].count = count;
160 phys_regions_count++;
161 }
162}
163
164/** Create memory zones
165 *
166 * Walk through available 256 KB chunks of physical
167 * memory and create zones.
168 *
169 * Note: It is assumed that the TLB is not yet being
170 * used in any way, thus there is no interference.
171 *
172 */
173void frame_low_arch_init(void)
174{
175 ipl_t ipl = interrupts_disable();
176
177 /* Clear and initialize TLB */
178 cp0_pagemask_write(ZERO_PAGE_MASK);
179 cp0_entry_lo0_write(0);
180 cp0_entry_lo1_write(0);
181 cp0_entry_hi_write(0);
182
183 for (size_t i = 0; i < TLB_ENTRY_COUNT; i++) {
184 cp0_index_write(i);
185 tlbwi();
186 }
187
188 pfn_t start_frame = 0;
189 pfn_t frame;
190 bool avail = true;
191
192 /* Walk through all 1 MB frames */
193 for (frame = 0; frame < ZERO_FRAMES; frame++) {
194 if (!frame_available(frame))
195 avail = false;
196 else {
197 if (frame_safe(frame)) {
198 entry_lo_t lo0;
199 entry_lo_t lo1;
200 entry_hi_t hi;
201 tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
202 tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
203 tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
204
205 cp0_pagemask_write(ZERO_PAGE_MASK);
206 cp0_entry_lo0_write(lo0.value);
207 cp0_entry_lo1_write(lo1.value);
208 cp0_entry_hi_write(hi.value);
209 cp0_index_write(ZERO_PAGE_TLBI);
210 tlbwi();
211
212 ZERO_PAGE_VALUE = 0;
213 if (ZERO_PAGE_VALUE != 0)
214 avail = false;
215 else {
216 ZERO_PAGE_VALUE = 0xdeadbeef;
217 if (ZERO_PAGE_VALUE != 0xdeadbeef)
218 avail = false;
219 }
220 }
221 }
222
223 if (!avail) {
224 frame_add_region(start_frame, frame, true);
225 start_frame = frame + 1;
226 avail = true;
227 }
228 }
229
230 frame_add_region(start_frame, frame, true);
231
232 /* Blacklist interrupt vector frame */
233 frame_mark_unavailable(0, 1);
234
235 /* Cleanup */
236 cp0_pagemask_write(ZERO_PAGE_MASK);
237 cp0_entry_lo0_write(0);
238 cp0_entry_lo1_write(0);
239 cp0_entry_hi_write(0);
240 cp0_index_write(ZERO_PAGE_TLBI);
241 tlbwi();
242
243 interrupts_restore(ipl);
244}
245
246void frame_high_arch_init(void)
247{
248}
249
250void physmem_print(void)
251{
252 printf("[base ] [size ]\n");
253
254 for (size_t i = 0; i < phys_regions_count; i++) {
255 printf("%#018lx %18lu\n", PFN2ADDR(phys_regions[i].start),
256 PFN2ADDR(phys_regions[i].count));
257 }
258}
259
260/** @}
261 */
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