| 1 | /* | 
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| 2 | * Copyright (c) 2005 Jakub Jermar | 
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| 3 | * All rights reserved. | 
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| 4 | * | 
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| 5 | * Redistribution and use in source and binary forms, with or without | 
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| 6 | * modification, are permitted provided that the following conditions | 
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| 7 | * are met: | 
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| 8 | * | 
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| 9 | * - Redistributions of source code must retain the above copyright | 
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| 10 | *   notice, this list of conditions and the following disclaimer. | 
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| 11 | * - Redistributions in binary form must reproduce the above copyright | 
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| 12 | *   notice, this list of conditions and the following disclaimer in the | 
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| 13 | *   documentation and/or other materials provided with the distribution. | 
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| 14 | * - The name of the author may not be used to endorse or promote products | 
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| 15 | *   derived from this software without specific prior written permission. | 
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| 16 | * | 
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | 
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | 
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | 
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | 
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | 
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | 
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | 
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | 
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | 
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 
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| 27 | */ | 
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| 28 |  | 
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| 29 | /** @addtogroup mips64mm | 
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| 30 | * @{ | 
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| 31 | */ | 
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| 32 | /** @file | 
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| 33 | */ | 
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| 34 |  | 
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| 35 | #include <macros.h> | 
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| 36 | #include <arch/mm/frame.h> | 
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| 37 | #include <arch/mm/tlb.h> | 
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| 38 | #include <interrupt.h> | 
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| 39 | #include <mm/frame.h> | 
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| 40 | #include <mm/asid.h> | 
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| 41 | #include <config.h> | 
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| 42 | #include <arch/drivers/msim.h> | 
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| 43 | #include <print.h> | 
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| 44 |  | 
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| 45 | #define ZERO_PAGE_MASK    TLB_PAGE_MASK_256K | 
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| 46 | #define ZERO_FRAMES       2048 | 
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| 47 | #define ZERO_PAGE_WIDTH   18  /* 256K */ | 
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| 48 | #define ZERO_PAGE_SIZE    (1 << ZERO_PAGE_WIDTH) | 
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| 49 | #define ZERO_PAGE_ASID    ASID_INVALID | 
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| 50 | #define ZERO_PAGE_TLBI    0 | 
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| 51 | #define ZERO_PAGE_ADDR    0 | 
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| 52 | #define ZERO_PAGE_OFFSET  (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1) | 
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| 53 | #define ZERO_PAGE_VALUE   (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET]) | 
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| 54 |  | 
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| 55 | #define ZERO_PAGE_VALUE_KSEG1(frame) \ | 
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| 56 | (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET]) | 
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| 57 |  | 
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| 58 | #define MAX_REGIONS  32 | 
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| 59 |  | 
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| 60 | typedef struct { | 
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| 61 | pfn_t start; | 
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| 62 | pfn_t count; | 
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| 63 | } phys_region_t; | 
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| 64 |  | 
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| 65 | static size_t phys_regions_count = 0; | 
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| 66 | static phys_region_t phys_regions[MAX_REGIONS]; | 
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| 67 |  | 
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| 68 | /** Check whether frame is available | 
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| 69 | * | 
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| 70 | * Returns true if given frame is generally available for use. | 
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| 71 | * Returns false if given frame is used for physical memory | 
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| 72 | * mapped devices and cannot be used. | 
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| 73 | * | 
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| 74 | */ | 
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| 75 | static bool frame_available(pfn_t frame) | 
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| 76 | { | 
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| 77 | #ifdef MACHINE_msim | 
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| 78 | /* MSIM device (dprinter) */ | 
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| 79 | if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH)) | 
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| 80 | return false; | 
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| 81 |  | 
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| 82 | /* MSIM device (dkeyboard) */ | 
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| 83 | if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH)) | 
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| 84 | return false; | 
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| 85 | #endif | 
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| 86 |  | 
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| 87 | return true; | 
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| 88 | } | 
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| 89 |  | 
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| 90 | /** Check whether frame is safe to write | 
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| 91 | * | 
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| 92 | * Returns true if given frame is safe for read/write test. | 
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| 93 | * Returns false if given frame should not be touched. | 
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| 94 | * | 
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| 95 | */ | 
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| 96 | static bool frame_safe(pfn_t frame) | 
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| 97 | { | 
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| 98 | /* Kernel structures */ | 
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| 99 | if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base)) | 
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| 100 | return false; | 
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| 101 |  | 
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| 102 | /* Kernel */ | 
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| 103 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, | 
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| 104 | KA2PA(config.base), config.kernel_size)) | 
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| 105 | return false; | 
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| 106 |  | 
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| 107 | /* Kernel stack */ | 
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| 108 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, | 
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| 109 | KA2PA(config.stack_base), config.stack_size)) | 
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| 110 | return false; | 
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| 111 |  | 
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| 112 | /* Init tasks */ | 
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| 113 | bool safe = true; | 
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| 114 | size_t i; | 
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| 115 | for (i = 0; i < init.cnt; i++) | 
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| 116 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, | 
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| 117 | KA2PA(init.tasks[i].addr), init.tasks[i].size)) { | 
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| 118 | safe = false; | 
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| 119 | break; | 
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| 120 | } | 
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| 121 |  | 
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| 122 | return safe; | 
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| 123 | } | 
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| 124 |  | 
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| 125 | static void frame_add_region(pfn_t start_frame, pfn_t end_frame) | 
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| 126 | { | 
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| 127 | if (end_frame > start_frame) { | 
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| 128 | /* Convert 1M frames to 16K frames */ | 
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| 129 | pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH); | 
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| 130 | pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH); | 
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| 131 |  | 
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| 132 | /* Interrupt vector frame is blacklisted */ | 
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| 133 | pfn_t conf_frame; | 
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| 134 | if (first == 0) | 
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| 135 | conf_frame = 1; | 
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| 136 | else | 
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| 137 | conf_frame = first; | 
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| 138 |  | 
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| 139 | zone_create(first, count, conf_frame, 0); | 
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| 140 |  | 
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| 141 | if (phys_regions_count < MAX_REGIONS) { | 
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| 142 | phys_regions[phys_regions_count].start = first; | 
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| 143 | phys_regions[phys_regions_count].count = count; | 
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| 144 | phys_regions_count++; | 
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| 145 | } | 
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| 146 | } | 
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| 147 | } | 
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| 148 |  | 
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| 149 | /** Create memory zones | 
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| 150 | * | 
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| 151 | * Walk through available 256 KB chunks of physical | 
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| 152 | * memory and create zones. | 
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| 153 | * | 
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| 154 | * Note: It is assumed that the TLB is not yet being | 
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| 155 | * used in any way, thus there is no interference. | 
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| 156 | * | 
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| 157 | */ | 
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| 158 | void frame_arch_init(void) | 
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| 159 | { | 
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| 160 | ipl_t ipl = interrupts_disable(); | 
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| 161 |  | 
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| 162 | /* Clear and initialize TLB */ | 
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| 163 | cp0_pagemask_write(ZERO_PAGE_MASK); | 
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| 164 | cp0_entry_lo0_write(0); | 
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| 165 | cp0_entry_lo1_write(0); | 
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| 166 | cp0_entry_hi_write(0); | 
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| 167 |  | 
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| 168 | for (size_t i = 0; i < TLB_ENTRY_COUNT; i++) { | 
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| 169 | cp0_index_write(i); | 
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| 170 | tlbwi(); | 
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| 171 | } | 
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| 172 |  | 
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| 173 | pfn_t start_frame = 0; | 
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| 174 | pfn_t frame; | 
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| 175 | bool avail = true; | 
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| 176 |  | 
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| 177 | /* Walk through all 1 MB frames */ | 
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| 178 | for (frame = 0; frame < ZERO_FRAMES; frame++) { | 
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| 179 | if (!frame_available(frame)) | 
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| 180 | avail = false; | 
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| 181 | else { | 
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| 182 | if (frame_safe(frame)) { | 
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| 183 | entry_lo_t lo0; | 
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| 184 | entry_lo_t lo1; | 
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| 185 | entry_hi_t hi; | 
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| 186 | tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12)); | 
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| 187 | tlb_prepare_entry_lo(&lo1, false, false, false, false, 0); | 
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| 188 | tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR); | 
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| 189 |  | 
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| 190 | cp0_pagemask_write(ZERO_PAGE_MASK); | 
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| 191 | cp0_entry_lo0_write(lo0.value); | 
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| 192 | cp0_entry_lo1_write(lo1.value); | 
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| 193 | cp0_entry_hi_write(hi.value); | 
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| 194 | cp0_index_write(ZERO_PAGE_TLBI); | 
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| 195 | tlbwi(); | 
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| 196 |  | 
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| 197 | ZERO_PAGE_VALUE = 0; | 
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| 198 | if (ZERO_PAGE_VALUE != 0) | 
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| 199 | avail = false; | 
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| 200 | else { | 
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| 201 | ZERO_PAGE_VALUE = 0xdeadbeef; | 
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| 202 | if (ZERO_PAGE_VALUE != 0xdeadbeef) | 
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| 203 | avail = false; | 
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| 204 | } | 
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| 205 | } | 
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| 206 | } | 
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| 207 |  | 
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| 208 | if (!avail) { | 
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| 209 | frame_add_region(start_frame, frame); | 
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| 210 | start_frame = frame + 1; | 
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| 211 | avail = true; | 
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| 212 | } | 
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| 213 | } | 
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| 214 |  | 
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| 215 | frame_add_region(start_frame, frame); | 
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| 216 |  | 
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| 217 | /* Blacklist interrupt vector frame */ | 
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| 218 | frame_mark_unavailable(0, 1); | 
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| 219 |  | 
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| 220 | /* Cleanup */ | 
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| 221 | cp0_pagemask_write(ZERO_PAGE_MASK); | 
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| 222 | cp0_entry_lo0_write(0); | 
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| 223 | cp0_entry_lo1_write(0); | 
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| 224 | cp0_entry_hi_write(0); | 
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| 225 | cp0_index_write(ZERO_PAGE_TLBI); | 
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| 226 | tlbwi(); | 
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| 227 |  | 
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| 228 | interrupts_restore(ipl); | 
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| 229 | } | 
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| 230 |  | 
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| 231 | void physmem_print(void) | 
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| 232 | { | 
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| 233 | printf("[base            ] [size            ]\n"); | 
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| 234 |  | 
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| 235 | for (size_t i = 0; i < phys_regions_count; i++) { | 
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| 236 | printf("%#018lx %18lu\n", PFN2ADDR(phys_regions[i].start), | 
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| 237 | PFN2ADDR(phys_regions[i].count)); | 
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| 238 | } | 
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| 239 | } | 
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| 240 |  | 
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| 241 | /** @} | 
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| 242 | */ | 
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