[a5d1331] | 1 | #
|
---|
[df4ed85] | 2 | # Copyright (c) 2003-2004 Jakub Jermar
|
---|
[f761f1eb] | 3 | # All rights reserved.
|
---|
| 4 | #
|
---|
| 5 | # Redistribution and use in source and binary forms, with or without
|
---|
| 6 | # modification, are permitted provided that the following conditions
|
---|
| 7 | # are met:
|
---|
| 8 | #
|
---|
| 9 | # - Redistributions of source code must retain the above copyright
|
---|
| 10 | # notice, this list of conditions and the following disclaimer.
|
---|
| 11 | # - Redistributions in binary form must reproduce the above copyright
|
---|
| 12 | # notice, this list of conditions and the following disclaimer in the
|
---|
| 13 | # documentation and/or other materials provided with the distribution.
|
---|
| 14 | # - The name of the author may not be used to endorse or promote products
|
---|
| 15 | # derived from this software without specific prior written permission.
|
---|
| 16 | #
|
---|
| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
---|
| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
---|
| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
---|
| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
---|
| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
---|
| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
---|
| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
---|
| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
---|
| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
---|
| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
---|
| 27 | #
|
---|
| 28 |
|
---|
[e84439a] | 29 | #include <arch/asm/regname.h>
|
---|
| 30 | #include <arch/mm/page.h>
|
---|
| 31 | #include <arch/asm/boot.h>
|
---|
[909c6e3] | 32 | #include <arch/context_offset.h>
|
---|
[9c2fb97] | 33 | #include <arch/stack.h>
|
---|
[e84439a] | 34 |
|
---|
[f761f1eb] | 35 | .text
|
---|
| 36 |
|
---|
| 37 | .set noat
|
---|
| 38 | .set noreorder
|
---|
| 39 | .set nomacro
|
---|
| 40 |
|
---|
| 41 | .global kernel_image_start
|
---|
| 42 | .global tlb_refill_entry
|
---|
| 43 | .global cache_error_entry
|
---|
| 44 | .global exception_entry
|
---|
[2bd4fdf] | 45 | .global userspace_asm
|
---|
[f761f1eb] | 46 |
|
---|
[1b109cb] | 47 | # Which status bits should are thread-local
|
---|
| 48 | #define REG_SAVE_MASK 0x1f # KSU(UM), EXL, ERL, IE
|
---|
| 49 |
|
---|
[2bd4fdf] | 50 | # Save registers to space defined by \r
|
---|
[1b109cb] | 51 | # We will change status: Disable ERL,EXL,UM,IE
|
---|
| 52 | # These changes will be automatically reversed in REGISTER_LOAD
|
---|
[741ade3f] | 53 | # SP is NOT saved as part of these registers
|
---|
[1b109cb] | 54 | .macro REGISTERS_STORE_AND_EXC_RESET r
|
---|
[9c2fb97] | 55 | sw $at, EOFFSET_AT(\r)
|
---|
| 56 | sw $v0, EOFFSET_V0(\r)
|
---|
| 57 | sw $v1, EOFFSET_V1(\r)
|
---|
| 58 | sw $a0, EOFFSET_A0(\r)
|
---|
| 59 | sw $a1, EOFFSET_A1(\r)
|
---|
| 60 | sw $a2, EOFFSET_A2(\r)
|
---|
| 61 | sw $a3, EOFFSET_A3(\r)
|
---|
| 62 | sw $t0, EOFFSET_T0(\r)
|
---|
| 63 | sw $t1, EOFFSET_T1(\r)
|
---|
| 64 | sw $t2, EOFFSET_T2(\r)
|
---|
| 65 | sw $t3, EOFFSET_T3(\r)
|
---|
| 66 | sw $t4, EOFFSET_T4(\r)
|
---|
| 67 | sw $t5, EOFFSET_T5(\r)
|
---|
| 68 | sw $t6, EOFFSET_T6(\r)
|
---|
| 69 | sw $t7, EOFFSET_T7(\r)
|
---|
| 70 | sw $t8, EOFFSET_T8(\r)
|
---|
| 71 | sw $t9, EOFFSET_T9(\r)
|
---|
[2bd4fdf] | 72 |
|
---|
| 73 | mflo $at
|
---|
| 74 | sw $at, EOFFSET_LO(\r)
|
---|
| 75 | mfhi $at
|
---|
| 76 | sw $at, EOFFSET_HI(\r)
|
---|
| 77 |
|
---|
[9c2fb97] | 78 | sw $gp, EOFFSET_GP(\r)
|
---|
| 79 | sw $ra, EOFFSET_RA(\r)
|
---|
| 80 | sw $k1, EOFFSET_K1(\r)
|
---|
[2bd4fdf] | 81 |
|
---|
[1b109cb] | 82 | mfc0 $t0, $status
|
---|
| 83 | mfc0 $t1, $epc
|
---|
| 84 |
|
---|
[9c2fb97] | 85 | and $t2, $t0, REG_SAVE_MASK # Save only KSU,EXL,ERL,IE
|
---|
[1b109cb] | 86 | li $t3, ~(0x1f)
|
---|
[9c2fb97] | 87 | and $t0, $t0, $t3 # Clear KSU,EXL,ERL,IE
|
---|
[1b109cb] | 88 |
|
---|
| 89 | sw $t2,EOFFSET_STATUS(\r)
|
---|
| 90 | sw $t1,EOFFSET_EPC(\r)
|
---|
| 91 | mtc0 $t0, $status
|
---|
[e84439a] | 92 | .endm
|
---|
| 93 |
|
---|
| 94 | .macro REGISTERS_LOAD r
|
---|
[1b109cb] | 95 | # Update only UM,EXR,IE from status, the rest
|
---|
| 96 | # is controlled by OS and not bound to task
|
---|
| 97 | mfc0 $t0, $status
|
---|
| 98 | lw $t1,EOFFSET_STATUS(\r)
|
---|
| 99 |
|
---|
[9c2fb97] | 100 | li $t2, ~REG_SAVE_MASK # Mask UM,EXL,ERL,IE
|
---|
[1b109cb] | 101 | and $t0, $t0, $t2
|
---|
| 102 |
|
---|
[9c2fb97] | 103 | or $t0, $t0, $t1 # Copy UM,EXL, ERL, IE from saved status
|
---|
[1b109cb] | 104 | mtc0 $t0, $status
|
---|
| 105 |
|
---|
[9c2fb97] | 106 | lw $v0, EOFFSET_V0(\r)
|
---|
| 107 | lw $v1, EOFFSET_V1(\r)
|
---|
| 108 | lw $a0, EOFFSET_A0(\r)
|
---|
| 109 | lw $a1, EOFFSET_A1(\r)
|
---|
| 110 | lw $a2, EOFFSET_A2(\r)
|
---|
| 111 | lw $a3, EOFFSET_A3(\r)
|
---|
| 112 | lw $t0, EOFFSET_T0(\r)
|
---|
| 113 | lw $t1, EOFFSET_T1(\r)
|
---|
| 114 | lw $t2, EOFFSET_T2(\r)
|
---|
| 115 | lw $t3, EOFFSET_T3(\r)
|
---|
| 116 | lw $t4, EOFFSET_T4(\r)
|
---|
| 117 | lw $t5, EOFFSET_T5(\r)
|
---|
| 118 | lw $t6, EOFFSET_T6(\r)
|
---|
| 119 | lw $t7, EOFFSET_T7(\r)
|
---|
| 120 | lw $t8, EOFFSET_T8(\r)
|
---|
| 121 | lw $t9, EOFFSET_T9(\r)
|
---|
[8d25b44] | 122 |
|
---|
[9c2fb97] | 123 | lw $gp, EOFFSET_GP(\r)
|
---|
| 124 | lw $ra, EOFFSET_RA(\r)
|
---|
| 125 | lw $k1, EOFFSET_K1(\r)
|
---|
[e84439a] | 126 |
|
---|
[9c2fb97] | 127 | lw $at, EOFFSET_LO(\r)
|
---|
[2bd4fdf] | 128 | mtlo $at
|
---|
[9c2fb97] | 129 | lw $at, EOFFSET_HI(\r)
|
---|
[2bd4fdf] | 130 | mthi $at
|
---|
| 131 |
|
---|
[9c2fb97] | 132 | lw $at, EOFFSET_EPC(\r)
|
---|
[909c6e3] | 133 | mtc0 $at, $epc
|
---|
[2bd4fdf] | 134 |
|
---|
[9c2fb97] | 135 | lw $at, EOFFSET_AT(\r)
|
---|
| 136 | lw $sp, EOFFSET_SP(\r)
|
---|
[e84439a] | 137 | .endm
|
---|
| 138 |
|
---|
[2bd4fdf] | 139 | # Move kernel stack pointer address to register K0
|
---|
| 140 | # - if we are in user mode, load the appropriate stack
|
---|
| 141 | # address
|
---|
| 142 | .macro KERNEL_STACK_TO_K0
|
---|
| 143 | # If we are in user mode
|
---|
| 144 | mfc0 $k0, $status
|
---|
| 145 | andi $k0, 0x10
|
---|
| 146 |
|
---|
| 147 | beq $k0, $0, 1f
|
---|
| 148 | add $k0, $sp, 0
|
---|
[e84439a] | 149 |
|
---|
[2bd4fdf] | 150 | # Move $k0 pointer to kernel stack
|
---|
| 151 | lui $k0, %hi(supervisor_sp)
|
---|
[85ddc05] | 152 | ori $k0, $k0, %lo(supervisor_sp)
|
---|
[2bd4fdf] | 153 | # Move $k0 (superveisor_sp)
|
---|
| 154 | lw $k0, 0($k0)
|
---|
| 155 | 1:
|
---|
| 156 | .endm
|
---|
| 157 |
|
---|
[f761f1eb] | 158 | .org 0x0
|
---|
[e84439a] | 159 | kernel_image_start:
|
---|
| 160 | /* Load temporary stack */
|
---|
[2bd4fdf] | 161 | lui $sp, %hi(end_stack)
|
---|
[85ddc05] | 162 | ori $sp, $sp, %lo(end_stack)
|
---|
[971cf31f] | 163 |
|
---|
| 164 | /* $a1 contains physical address of bootinfo_t */
|
---|
| 165 | /* $a2 contains size of bootinfo_t */
|
---|
| 166 |
|
---|
| 167 | beq $a2, $0, bootinfo_end
|
---|
| 168 |
|
---|
[e84439a] | 169 | /* Not sure about this, but might be needed for PIC code???? */
|
---|
| 170 | lui $gp, 0x8000
|
---|
| 171 |
|
---|
[971cf31f] | 172 | lui $a3, %hi(bootinfo)
|
---|
| 173 | ori $a3, $a3, %lo(bootinfo)
|
---|
| 174 |
|
---|
| 175 | bootinfo_loop:
|
---|
| 176 |
|
---|
| 177 | lw $v0, 0($a1)
|
---|
| 178 | sw $v0, 0($a3)
|
---|
| 179 |
|
---|
| 180 | addi $a1, $a1, 4
|
---|
| 181 | addi $a3, $a3, 4
|
---|
| 182 | addi $a2, $a2, -4
|
---|
| 183 |
|
---|
| 184 | bgtz $a2, bootinfo_loop
|
---|
| 185 | nop
|
---|
| 186 |
|
---|
| 187 | bootinfo_end:
|
---|
| 188 |
|
---|
[12c7f27] | 189 | jal arch_pre_main
|
---|
| 190 | nop
|
---|
| 191 |
|
---|
| 192 | j main_bsp
|
---|
[e84439a] | 193 | nop
|
---|
[2bd4fdf] | 194 |
|
---|
[e84439a] | 195 | .space TEMP_STACK_SIZE
|
---|
[ffc277e] | 196 | end_stack:
|
---|
| 197 |
|
---|
| 198 | tlb_refill_entry:
|
---|
| 199 | j tlb_refill_handler
|
---|
| 200 | nop
|
---|
| 201 |
|
---|
| 202 | cache_error_entry:
|
---|
| 203 | j cache_error_handler
|
---|
| 204 | nop
|
---|
| 205 |
|
---|
| 206 | exception_entry:
|
---|
| 207 | j exception_handler
|
---|
| 208 | nop
|
---|
[2bd4fdf] | 209 |
|
---|
| 210 | exception_handler:
|
---|
| 211 | KERNEL_STACK_TO_K0
|
---|
| 212 | sub $k0, REGISTER_SPACE
|
---|
[9c2fb97] | 213 | sw $sp, EOFFSET_SP($k0)
|
---|
[741ade3f] | 214 | move $sp, $k0
|
---|
[1b109cb] | 215 |
|
---|
[741ade3f] | 216 | mfc0 $k0, $cause
|
---|
[1b109cb] | 217 |
|
---|
[9c2fb97] | 218 | sra $k0, $k0, 0x2 # cp0_exc_cause() part 1
|
---|
| 219 | andi $k0, $k0, 0x1f # cp0_exc_cause() part 2
|
---|
| 220 | sub $k0, 8 # 8 = SYSCALL
|
---|
[1b109cb] | 221 |
|
---|
[741ade3f] | 222 | beqz $k0, syscall_shortcut
|
---|
[9c2fb97] | 223 | add $k0, 8 # Revert $k0 back to correct exc number
|
---|
[741ade3f] | 224 |
|
---|
| 225 | REGISTERS_STORE_AND_EXC_RESET $sp
|
---|
[1b109cb] | 226 |
|
---|
| 227 | move $a1, $sp
|
---|
[9c2fb97] | 228 | jal exc_dispatch # exc_dispatch(excno, register_space)
|
---|
[741ade3f] | 229 | move $a0, $k0
|
---|
[2bd4fdf] | 230 |
|
---|
| 231 | REGISTERS_LOAD $sp
|
---|
| 232 | # The $sp is automatically restored to former value
|
---|
| 233 | eret
|
---|
[1b109cb] | 234 |
|
---|
[9c2fb97] | 235 | ## Syscall entry
|
---|
| 236 | #
|
---|
| 237 | # Registers:
|
---|
| 238 | #
|
---|
| 239 | # @param v0 Syscall number.
|
---|
| 240 | # @param a0 1st argument.
|
---|
| 241 | # @param a1 2nd argument.
|
---|
| 242 | # @param a2 3rd argument.
|
---|
| 243 | # @param a3 4th argument.
|
---|
| 244 | # @param t0 5th argument.
|
---|
| 245 | # @param t1 6th argument.
|
---|
| 246 | #
|
---|
| 247 | # @return The return value will be stored in v0.
|
---|
| 248 | #
|
---|
| 249 | #define SS_SP EOFFSET_SP
|
---|
| 250 | #define SS_STATUS EOFFSET_STATUS
|
---|
| 251 | #define SS_EPC EOFFSET_EPC
|
---|
| 252 | #define SS_K1 EOFFSET_K1
|
---|
[53f9821] | 253 | syscall_shortcut:
|
---|
[1b109cb] | 254 | # We have a lot of space on the stack, with free use
|
---|
[9c2fb97] | 255 | mfc0 $t3, $epc
|
---|
| 256 | mfc0 $t2, $status
|
---|
| 257 | sw $t3, SS_EPC($sp) # Save EPC
|
---|
| 258 | sw $k1, SS_K1($sp) # Save k1 not saved on context switch
|
---|
[1b109cb] | 259 |
|
---|
[9c2fb97] | 260 | and $t4, $t2, REG_SAVE_MASK # Save only KSU, EXL, ERL, IE
|
---|
| 261 | li $t5, ~(0x1f)
|
---|
| 262 | and $t2, $t2, $t5 # Clear KSU, EXL, ERL
|
---|
| 263 | ori $t2, $t2, 0x1 # Set IE
|
---|
[1b109cb] | 264 |
|
---|
[9c2fb97] | 265 | sw $t4, SS_STATUS($sp)
|
---|
| 266 | mtc0 $t2, $status
|
---|
[1b109cb] | 267 |
|
---|
[9c2fb97] | 268 | #
|
---|
| 269 | # Call the higher level system call handler
|
---|
| 270 | # We are going to reuse part of the unused exception stack frame
|
---|
| 271 | #
|
---|
| 272 | sw $t0, STACK_ARG4($sp) # save the 5th argument on the stack
|
---|
| 273 | sw $t1, STACK_ARG5($sp) # save the 6th argument on the stack
|
---|
[1b109cb] | 274 | jal syscall_handler
|
---|
[9c2fb97] | 275 | sw $v0, STACK_ARG6($sp) # save the syscall number on the stack
|
---|
[1b109cb] | 276 |
|
---|
| 277 | # restore status
|
---|
[9c2fb97] | 278 | mfc0 $t2, $status
|
---|
| 279 | lw $t3, SS_STATUS($sp)
|
---|
[1b109cb] | 280 |
|
---|
[9c2fb97] | 281 | # Change back to EXL = 1 (from last exception), otherwise
|
---|
| 282 | # an interrupt could rewrite the CP0 - EPC
|
---|
| 283 | li $t4, ~REG_SAVE_MASK # Mask UM, EXL, ERL, IE
|
---|
| 284 | and $t2, $t2, $t4
|
---|
| 285 | or $t2, $t2, $t3 # Copy saved UM, EXL, ERL, IE
|
---|
| 286 | mtc0 $t2, $status
|
---|
[1b109cb] | 287 |
|
---|
[9c2fb97] | 288 | # restore epc + 4
|
---|
| 289 | lw $t2, SS_EPC($sp)
|
---|
| 290 | lw $k1, SS_K1($sp)
|
---|
| 291 | addi $t2, $t2, 4
|
---|
| 292 | mtc0 $t2, $epc
|
---|
[5201199] | 293 |
|
---|
[9c2fb97] | 294 | lw $sp, SS_SP($sp) # restore sp
|
---|
[1b109cb] | 295 |
|
---|
| 296 | eret
|
---|
[738ad2e] | 297 |
|
---|
[f761f1eb] | 298 | tlb_refill_handler:
|
---|
[2bd4fdf] | 299 | KERNEL_STACK_TO_K0
|
---|
| 300 | sub $k0, REGISTER_SPACE
|
---|
[1b109cb] | 301 | REGISTERS_STORE_AND_EXC_RESET $k0
|
---|
[741ade3f] | 302 | sw $sp,EOFFSET_SP($k0)
|
---|
[2bd4fdf] | 303 | add $sp, $k0, 0
|
---|
[76cec1e] | 304 |
|
---|
[2f40fe4] | 305 | jal tlb_refill
|
---|
[f58af46] | 306 | add $a0, $sp, 0
|
---|
[76cec1e] | 307 |
|
---|
[e84439a] | 308 | REGISTERS_LOAD $sp
|
---|
[76cec1e] | 309 |
|
---|
[4e1d008] | 310 | eret
|
---|
[f761f1eb] | 311 |
|
---|
| 312 | cache_error_handler:
|
---|
[2bd4fdf] | 313 | KERNEL_STACK_TO_K0
|
---|
[741ade3f] | 314 | sub $k0, REGISTER_SPACE
|
---|
| 315 | REGISTERS_STORE_AND_EXC_RESET $k0
|
---|
| 316 | sw $sp,EOFFSET_SP($k0)
|
---|
[2bd4fdf] | 317 | add $sp, $k0, 0
|
---|
[f761f1eb] | 318 |
|
---|
[4e1d008] | 319 | jal cache_error
|
---|
[2f40fe4] | 320 | add $a0, $sp, 0
|
---|
[76cec1e] | 321 |
|
---|
[e84439a] | 322 | REGISTERS_LOAD $sp
|
---|
[f761f1eb] | 323 |
|
---|
[4e1d008] | 324 | eret
|
---|
[2bd4fdf] | 325 |
|
---|
| 326 | userspace_asm:
|
---|
| 327 | add $sp, $a0, 0
|
---|
[9cbd27b] | 328 | add $v0, $a1, 0
|
---|
[c98e6ee] | 329 | add $t9, $a2, 0 # Set up correct entry into PIC code
|
---|
| 330 | xor $a0, $a0, $a0 # $a0 is defined to hold pcb_ptr
|
---|
| 331 | # set it to 0
|
---|
[2bd4fdf] | 332 | eret
|
---|