[f761f1eb] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2005 Jakub Jermar
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[f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[2a1410d] | 29 | /** @addtogroup mips32mm
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[edebc15c] | 35 | #include <macros.h>
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[f761f1eb] | 36 | #include <arch/mm/frame.h>
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[edebc15c] | 37 | #include <arch/mm/tlb.h>
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[6c296a9] | 38 | #include <interrupt.h>
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[f761f1eb] | 39 | #include <mm/frame.h>
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[edebc15c] | 40 | #include <mm/asid.h>
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[84dd253] | 41 | #include <config.h>
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[edebc15c] | 42 | #include <arch/drivers/msim.h>
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| 43 | #include <print.h>
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| 44 |
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[b76e51d] | 45 | #define ZERO_PAGE_MASK TLB_PAGE_MASK_256K
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| 46 | #define ZERO_FRAMES 2048
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| 47 | #define ZERO_PAGE_WIDTH 18 /* 256K */
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| 48 | #define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)
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| 49 | #define ZERO_PAGE_ASID ASID_INVALID
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| 50 | #define ZERO_PAGE_TLBI 0
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| 51 | #define ZERO_PAGE_ADDR 0
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| 52 | #define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
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| 53 | #define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
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[edebc15c] | 54 |
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[b76e51d] | 55 | #define ZERO_PAGE_VALUE_KSEG1(frame) \
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| 56 | (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
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[8480714] | 57 |
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[b76e51d] | 58 | #define MAX_REGIONS 32
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[edebc15c] | 59 |
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| 60 | typedef struct {
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| 61 | pfn_t start;
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| 62 | pfn_t count;
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| 63 | } phys_region_t;
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| 64 |
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[98000fb] | 65 | static size_t phys_regions_count = 0;
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[edebc15c] | 66 | static phys_region_t phys_regions[MAX_REGIONS];
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| 67 |
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| 68 | /** Check whether frame is available
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| 69 | *
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| 70 | * Returns true if given frame is generally available for use.
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| 71 | * Returns false if given frame is used for physical memory
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| 72 | * mapped devices and cannot be used.
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| 73 | *
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| 74 | */
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| 75 | static bool frame_available(pfn_t frame)
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| 76 | {
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[e94f730] | 77 | #ifdef MACHINE_msim
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[edebc15c] | 78 | /* MSIM device (dprinter) */
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| 79 | if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
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| 80 | return false;
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| 81 |
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| 82 | /* MSIM device (dkeyboard) */
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| 83 | if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
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| 84 | return false;
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[8480714] | 85 | #endif
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[b76e51d] | 86 |
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[e94f730] | 87 | #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
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[8480714] | 88 | /* gxemul devices */
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| 89 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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| 90 | 0x10000000, MB2SIZE(256)))
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| 91 | return false;
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| 92 | #endif
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[edebc15c] | 93 |
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| 94 | return true;
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| 95 | }
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| 96 |
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| 97 |
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| 98 | /** Check whether frame is safe to write
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| 99 | *
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| 100 | * Returns true if given frame is safe for read/write test.
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| 101 | * Returns false if given frame should not be touched.
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| 102 | *
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| 103 | */
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| 104 | static bool frame_safe(pfn_t frame)
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| 105 | {
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| 106 | /* Kernel structures */
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| 107 | if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
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| 108 | return false;
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| 109 |
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| 110 | /* Kernel */
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| 111 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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| 112 | KA2PA(config.base), config.kernel_size))
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| 113 | return false;
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| 114 |
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| 115 | /* Kernel stack */
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| 116 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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| 117 | KA2PA(config.stack_base), config.stack_size))
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| 118 | return false;
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| 119 |
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| 120 | /* Init tasks */
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| 121 | bool safe = true;
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[98000fb] | 122 | size_t i;
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[edebc15c] | 123 | for (i = 0; i < init.cnt; i++)
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| 124 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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| 125 | KA2PA(init.tasks[i].addr), init.tasks[i].size)) {
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| 126 | safe = false;
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| 127 | break;
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| 128 | }
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| 129 |
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| 130 | return safe;
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| 131 | }
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| 132 |
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| 133 | static void frame_add_region(pfn_t start_frame, pfn_t end_frame)
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| 134 | {
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| 135 | if (end_frame > start_frame) {
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| 136 | /* Convert 1M frames to 16K frames */
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| 137 | pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);
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[6c296a9] | 138 | pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);
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[edebc15c] | 139 |
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| 140 | /* Interrupt vector frame is blacklisted */
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| 141 | pfn_t conf_frame;
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[c32a6f37] | 142 | if (first == 0)
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[edebc15c] | 143 | conf_frame = 1;
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| 144 | else
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| 145 | conf_frame = first;
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| 146 |
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| 147 | zone_create(first, count, conf_frame, 0);
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| 148 |
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| 149 | if (phys_regions_count < MAX_REGIONS) {
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| 150 | phys_regions[phys_regions_count].start = first;
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| 151 | phys_regions[phys_regions_count].count = count;
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| 152 | phys_regions_count++;
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| 153 | }
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| 154 | }
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| 155 | }
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| 156 |
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[f761f1eb] | 157 |
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[939dfd7] | 158 | /** Create memory zones
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| 159 | *
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[c32a6f37] | 160 | * Walk through available 256 KB chunks of physical
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[edebc15c] | 161 | * memory and create zones.
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| 162 | *
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[6c296a9] | 163 | * Note: It is assumed that the TLB is not yet being
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| 164 | * used in any way, thus there is no interference.
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| 165 | *
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[939dfd7] | 166 | */
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[f761f1eb] | 167 | void frame_arch_init(void)
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| 168 | {
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[6c296a9] | 169 | ipl_t ipl = interrupts_disable();
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[edebc15c] | 170 |
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[6c296a9] | 171 | /* Clear and initialize TLB */
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| 172 | cp0_pagemask_write(ZERO_PAGE_MASK);
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| 173 | cp0_entry_lo0_write(0);
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| 174 | cp0_entry_lo1_write(0);
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| 175 | cp0_entry_hi_write(0);
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| 176 |
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[98000fb] | 177 | size_t i;
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[6c296a9] | 178 | for (i = 0; i < TLB_ENTRY_COUNT; i++) {
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| 179 | cp0_index_write(i);
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| 180 | tlbwi();
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| 181 | }
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[edebc15c] | 182 |
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| 183 | pfn_t start_frame = 0;
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| 184 | pfn_t frame;
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| 185 | bool avail = true;
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| 186 |
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| 187 | /* Walk through all 1 MB frames */
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| 188 | for (frame = 0; frame < ZERO_FRAMES; frame++) {
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| 189 | if (!frame_available(frame))
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| 190 | avail = false;
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| 191 | else {
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| 192 | if (frame_safe(frame)) {
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| 193 | entry_lo_t lo0;
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| 194 | entry_lo_t lo1;
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| 195 | entry_hi_t hi;
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| 196 | tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
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| 197 | tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
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| 198 | tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
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| 199 |
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[6c296a9] | 200 | cp0_pagemask_write(ZERO_PAGE_MASK);
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[edebc15c] | 201 | cp0_entry_lo0_write(lo0.value);
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| 202 | cp0_entry_lo1_write(lo1.value);
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| 203 | cp0_entry_hi_write(hi.value);
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[6c296a9] | 204 | cp0_index_write(ZERO_PAGE_TLBI);
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[edebc15c] | 205 | tlbwi();
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| 206 |
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| 207 | ZERO_PAGE_VALUE = 0;
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| 208 | if (ZERO_PAGE_VALUE != 0)
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| 209 | avail = false;
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| 210 | else {
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| 211 | ZERO_PAGE_VALUE = 0xdeadbeef;
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| 212 | if (ZERO_PAGE_VALUE != 0xdeadbeef)
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| 213 | avail = false;
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[2a1410d] | 214 | #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul)
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[8480714] | 215 | else {
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| 216 | ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
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| 217 | if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
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| 218 | avail = false;
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| 219 | }
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| 220 | #endif
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[edebc15c] | 221 | }
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| 222 | }
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| 223 | }
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| 224 |
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| 225 | if (!avail) {
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| 226 | frame_add_region(start_frame, frame);
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| 227 | start_frame = frame + 1;
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| 228 | avail = true;
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| 229 | }
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[085d973] | 230 | }
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[edebc15c] | 231 |
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[e49e234] | 232 | frame_add_region(start_frame, frame);
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[edebc15c] | 233 |
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[6c296a9] | 234 | /* Blacklist interrupt vector frame */
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| 235 | frame_mark_unavailable(0, 1);
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| 236 |
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| 237 | /* Cleanup */
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| 238 | cp0_pagemask_write(ZERO_PAGE_MASK);
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| 239 | cp0_entry_lo0_write(0);
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| 240 | cp0_entry_lo1_write(0);
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| 241 | cp0_entry_hi_write(0);
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[edebc15c] | 242 | cp0_index_write(ZERO_PAGE_TLBI);
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| 243 | tlbwi();
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| 244 |
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[6c296a9] | 245 | interrupts_restore(ipl);
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[edebc15c] | 246 | }
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| 247 |
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| 248 |
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| 249 | void physmem_print(void)
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| 250 | {
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[ccb426c] | 251 | printf("[base ] [size ]\n");
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[edebc15c] | 252 |
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[98000fb] | 253 | size_t i;
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[edebc15c] | 254 | for (i = 0; i < phys_regions_count; i++) {
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[0d387d2] | 255 | printf("%#010x %10u\n",
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[edebc15c] | 256 | PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));
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| 257 | }
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[f761f1eb] | 258 | }
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[b45c443] | 259 |
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[a6dd361] | 260 | /** @}
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[b45c443] | 261 | */
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