[f761f1eb] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2005 Jakub Jermar
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[f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[2a1410d] | 29 | /** @addtogroup mips32mm
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[edebc15c] | 35 | #include <macros.h>
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[f761f1eb] | 36 | #include <arch/mm/frame.h>
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[edebc15c] | 37 | #include <arch/mm/tlb.h>
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[6c296a9] | 38 | #include <interrupt.h>
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[f761f1eb] | 39 | #include <mm/frame.h>
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[edebc15c] | 40 | #include <mm/asid.h>
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[84dd253] | 41 | #include <config.h>
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[3c50cddc] | 42 | #ifdef MACHINE_msim
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[edebc15c] | 43 | #include <arch/drivers/msim.h>
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[3c50cddc] | 44 | #endif
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[bcad855] | 45 | #include <arch/arch.h>
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[edebc15c] | 46 | #include <print.h>
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| 47 |
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[b76e51d] | 48 | #define ZERO_PAGE_MASK TLB_PAGE_MASK_256K
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| 49 | #define ZERO_FRAMES 2048
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| 50 | #define ZERO_PAGE_WIDTH 18 /* 256K */
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| 51 | #define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)
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| 52 | #define ZERO_PAGE_ASID ASID_INVALID
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| 53 | #define ZERO_PAGE_TLBI 0
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| 54 | #define ZERO_PAGE_ADDR 0
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| 55 | #define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
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| 56 | #define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
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[edebc15c] | 57 |
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[b76e51d] | 58 | #define ZERO_PAGE_VALUE_KSEG1(frame) \
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| 59 | (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
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[8480714] | 60 |
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[b76e51d] | 61 | #define MAX_REGIONS 32
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[edebc15c] | 62 |
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| 63 | typedef struct {
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| 64 | pfn_t start;
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| 65 | pfn_t count;
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| 66 | } phys_region_t;
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| 67 |
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[98000fb] | 68 | static size_t phys_regions_count = 0;
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[edebc15c] | 69 | static phys_region_t phys_regions[MAX_REGIONS];
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| 70 |
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| 71 | /** Check whether frame is available
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| 72 | *
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| 73 | * Returns true if given frame is generally available for use.
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| 74 | * Returns false if given frame is used for physical memory
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| 75 | * mapped devices and cannot be used.
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| 76 | *
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| 77 | */
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| 78 | static bool frame_available(pfn_t frame)
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| 79 | {
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[e94f730] | 80 | #ifdef MACHINE_msim
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[edebc15c] | 81 | /* MSIM device (dprinter) */
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| 82 | if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
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| 83 | return false;
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[a35b458] | 84 |
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[edebc15c] | 85 | /* MSIM device (dkeyboard) */
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| 86 | if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
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| 87 | return false;
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[8480714] | 88 | #endif
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[bcad855] | 89 |
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| 90 | #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
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| 91 | if (frame >= (sdram_size >> ZERO_PAGE_WIDTH))
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| 92 | return false;
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| 93 | #endif
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[a35b458] | 94 |
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[edebc15c] | 95 | return true;
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| 96 | }
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| 97 |
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| 98 |
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| 99 | /** Check whether frame is safe to write
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| 100 | *
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| 101 | * Returns true if given frame is safe for read/write test.
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| 102 | * Returns false if given frame should not be touched.
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| 103 | *
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| 104 | */
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| 105 | static bool frame_safe(pfn_t frame)
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| 106 | {
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| 107 | /* Kernel structures */
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| 108 | if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
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| 109 | return false;
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[a35b458] | 110 |
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[edebc15c] | 111 | /* Kernel */
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| 112 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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| 113 | KA2PA(config.base), config.kernel_size))
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| 114 | return false;
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[a35b458] | 115 |
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[edebc15c] | 116 | /* Kernel stack */
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| 117 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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| 118 | KA2PA(config.stack_base), config.stack_size))
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| 119 | return false;
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[a35b458] | 120 |
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[edebc15c] | 121 | /* Init tasks */
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| 122 | bool safe = true;
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[98000fb] | 123 | size_t i;
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[edebc15c] | 124 | for (i = 0; i < init.cnt; i++)
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| 125 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
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[32817cc] | 126 | init.tasks[i].paddr, init.tasks[i].size)) {
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[edebc15c] | 127 | safe = false;
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| 128 | break;
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| 129 | }
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[a35b458] | 130 |
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[edebc15c] | 131 | return safe;
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| 132 | }
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| 133 |
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[42f60375] | 134 | static void frame_add_region(pfn_t start_frame, pfn_t end_frame, bool low)
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[edebc15c] | 135 | {
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[42f60375] | 136 | if (end_frame <= start_frame)
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| 137 | return;
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| 138 |
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| 139 | uintptr_t base = start_frame << ZERO_PAGE_WIDTH;
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| 140 | size_t size = (end_frame - start_frame) << ZERO_PAGE_WIDTH;
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| 141 |
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| 142 | if (!frame_adjust_zone_bounds(low, &base, &size))
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[1b20da0] | 143 | return;
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[42f60375] | 144 |
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| 145 | pfn_t first = ADDR2PFN(base);
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| 146 | size_t count = SIZE2FRAMES(size);
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| 147 | pfn_t conf_frame;
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| 148 |
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| 149 | if (low) {
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[edebc15c] | 150 | /* Interrupt vector frame is blacklisted */
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[c32a6f37] | 151 | if (first == 0)
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[edebc15c] | 152 | conf_frame = 1;
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| 153 | else
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| 154 | conf_frame = first;
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[42f60375] | 155 | zone_create(first, count, conf_frame,
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| 156 | ZONE_AVAILABLE | ZONE_LOWMEM);
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| 157 | } else {
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| 158 | conf_frame = zone_external_conf_alloc(count);
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[7852625] | 159 | if (conf_frame != 0)
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| 160 | zone_create(first, count, conf_frame,
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| 161 | ZONE_AVAILABLE | ZONE_HIGHMEM);
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[42f60375] | 162 | }
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[a35b458] | 163 |
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[42f60375] | 164 | if (phys_regions_count < MAX_REGIONS) {
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| 165 | phys_regions[phys_regions_count].start = first;
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| 166 | phys_regions[phys_regions_count].count = count;
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| 167 | phys_regions_count++;
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[edebc15c] | 168 | }
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| 169 | }
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| 170 |
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[f761f1eb] | 171 |
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[939dfd7] | 172 | /** Create memory zones
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| 173 | *
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[c32a6f37] | 174 | * Walk through available 256 KB chunks of physical
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[edebc15c] | 175 | * memory and create zones.
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| 176 | *
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[6c296a9] | 177 | * Note: It is assumed that the TLB is not yet being
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| 178 | * used in any way, thus there is no interference.
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| 179 | *
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[939dfd7] | 180 | */
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[ddcc8a0] | 181 | void frame_low_arch_init(void)
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[f761f1eb] | 182 | {
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[6c296a9] | 183 | ipl_t ipl = interrupts_disable();
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[a35b458] | 184 |
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[6c296a9] | 185 | /* Clear and initialize TLB */
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| 186 | cp0_pagemask_write(ZERO_PAGE_MASK);
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| 187 | cp0_entry_lo0_write(0);
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| 188 | cp0_entry_lo1_write(0);
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| 189 | cp0_entry_hi_write(0);
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| 190 |
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[98000fb] | 191 | size_t i;
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[6c296a9] | 192 | for (i = 0; i < TLB_ENTRY_COUNT; i++) {
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| 193 | cp0_index_write(i);
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| 194 | tlbwi();
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| 195 | }
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[a35b458] | 196 |
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[edebc15c] | 197 | pfn_t start_frame = 0;
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| 198 | pfn_t frame;
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| 199 | bool avail = true;
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[a35b458] | 200 |
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[edebc15c] | 201 | /* Walk through all 1 MB frames */
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| 202 | for (frame = 0; frame < ZERO_FRAMES; frame++) {
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| 203 | if (!frame_available(frame))
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| 204 | avail = false;
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| 205 | else {
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| 206 | if (frame_safe(frame)) {
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| 207 | entry_lo_t lo0;
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| 208 | entry_lo_t lo1;
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| 209 | entry_hi_t hi;
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| 210 | tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
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| 211 | tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
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| 212 | tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
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[a35b458] | 213 |
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[6c296a9] | 214 | cp0_pagemask_write(ZERO_PAGE_MASK);
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[edebc15c] | 215 | cp0_entry_lo0_write(lo0.value);
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| 216 | cp0_entry_lo1_write(lo1.value);
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| 217 | cp0_entry_hi_write(hi.value);
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[6c296a9] | 218 | cp0_index_write(ZERO_PAGE_TLBI);
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[edebc15c] | 219 | tlbwi();
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[a35b458] | 220 |
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[edebc15c] | 221 | ZERO_PAGE_VALUE = 0;
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| 222 | if (ZERO_PAGE_VALUE != 0)
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| 223 | avail = false;
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| 224 | else {
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| 225 | ZERO_PAGE_VALUE = 0xdeadbeef;
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| 226 | if (ZERO_PAGE_VALUE != 0xdeadbeef)
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| 227 | avail = false;
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| 228 | }
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| 229 | }
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| 230 | }
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[a35b458] | 231 |
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[edebc15c] | 232 | if (!avail) {
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[42f60375] | 233 | frame_add_region(start_frame, frame, true);
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[edebc15c] | 234 | start_frame = frame + 1;
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| 235 | avail = true;
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| 236 | }
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[085d973] | 237 | }
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[a35b458] | 238 |
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[42f60375] | 239 | frame_add_region(start_frame, frame, true);
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[a35b458] | 240 |
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[6c296a9] | 241 | /* Blacklist interrupt vector frame */
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| 242 | frame_mark_unavailable(0, 1);
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[14febed9] | 243 |
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| 244 | #if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
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| 245 | /* Blacklist memory regions used by YAMON.
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| 246 | *
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| 247 | * The YAMON User's Manual vaguely says the following physical addresses
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| 248 | * are taken by YAMON:
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| 249 | *
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| 250 | * 0x1000 YAMON functions
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| 251 | * 0x5000 YAMON code
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| 252 | *
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| 253 | * These addresses overlap with the beginning of the SDRAM so we need to
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| 254 | * make sure they cannot be allocated.
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| 255 | *
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| 256 | * The User's Manual unfortunately does not say where does the SDRAM
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| 257 | * portion used by YAMON end.
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| 258 | *
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| 259 | * Looking into the YAMON 02.21 sources, it looks like the first free
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| 260 | * address is computed dynamically and depends on the size of the YAMON
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| 261 | * image. From the YAMON binary, it appears to be 0xc0d50 or roughly
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| 262 | * 772 KiB for that particular version.
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| 263 | *
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| 264 | * Linux is linked to 1MiB which seems to be a safe bet and a reasonable
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| 265 | * upper bound for memory taken by YAMON. We will use it too.
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| 266 | */
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| 267 | frame_mark_unavailable(0, 1024 * 1024 / FRAME_SIZE);
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| 268 | #endif
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[a35b458] | 269 |
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[6c296a9] | 270 | /* Cleanup */
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| 271 | cp0_pagemask_write(ZERO_PAGE_MASK);
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| 272 | cp0_entry_lo0_write(0);
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| 273 | cp0_entry_lo1_write(0);
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| 274 | cp0_entry_hi_write(0);
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[edebc15c] | 275 | cp0_index_write(ZERO_PAGE_TLBI);
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| 276 | tlbwi();
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[a35b458] | 277 |
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[6c296a9] | 278 | interrupts_restore(ipl);
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[edebc15c] | 279 | }
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| 280 |
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[ddcc8a0] | 281 | void frame_high_arch_init(void)
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| 282 | {
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| 283 | }
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[edebc15c] | 284 |
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| 285 | void physmem_print(void)
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| 286 | {
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[ccb426c] | 287 | printf("[base ] [size ]\n");
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[a35b458] | 288 |
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[98000fb] | 289 | size_t i;
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[edebc15c] | 290 | for (i = 0; i < phys_regions_count; i++) {
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[0d387d2] | 291 | printf("%#010x %10u\n",
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[edebc15c] | 292 | PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));
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[1b20da0] | 293 | }
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[f761f1eb] | 294 | }
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[b45c443] | 295 |
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[a6dd361] | 296 | /** @}
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[b45c443] | 297 | */
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