source: mainline/kernel/arch/mips32/src/mips32.c@ ecf0a04b

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ecf0a04b was dabaa83, checked in by Jakub Jermar <jakub@…>, 7 years ago

Add boot arguments support for Malta

This commit makes it possible to pass console configuration via proper
boot arguemnts instead of having a hardcoded value in the kernel.

  • Property mode set to 100644
File size: 5.8 KB
Line 
1/*
2 * Copyright (c) 2003-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup kernel_mips32
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36#include <arch/arch.h>
37#include <typedefs.h>
38#include <errno.h>
39#include <interrupt.h>
40#include <macros.h>
41#include <str.h>
42#include <mem.h>
43#include <userspace.h>
44#include <stdbool.h>
45#include <syscall/syscall.h>
46#include <sysinfo/sysinfo.h>
47#include <arch/debug.h>
48#include <arch/debugger.h>
49#include <arch/machine_func.h>
50
51/*
52 * Size of the code jumping to the exception handler code
53 * - J+NOP
54 */
55#define EXCEPTION_JUMP_SIZE 8
56
57#define TLB_EXC ((char *) 0x80000000)
58#define NORM_EXC ((char *) 0x80000180)
59#define CACHE_EXC ((char *) 0x80000100)
60
61static void mips32_pre_mm_init(void);
62static void mips32_post_mm_init(void);
63static void mips32_post_smp_init(void);
64
65arch_ops_t mips32_ops = {
66 .pre_mm_init = mips32_pre_mm_init,
67 .post_mm_init = mips32_post_mm_init,
68 .post_smp_init = mips32_post_smp_init,
69};
70
71arch_ops_t *arch_ops = &mips32_ops;
72
73/*
74 * Why the linker moves the variable 64K away in assembler
75 * when not in .text section?
76 */
77
78/* Stack pointer saved when entering user mode */
79uintptr_t supervisor_sp __attribute__((section(".text")));
80
81size_t cpu_count = 0;
82
83#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
84size_t sdram_size = 0;
85#endif
86
87/** Performs mips32-specific initialization before main_bsp() is called. */
88void mips32_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
89{
90 init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
91
92 size_t i;
93 for (i = 0; i < init.cnt; i++) {
94 init.tasks[i].paddr = KA2PA(bootinfo->taskmap.tasks[i].addr);
95 init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
96 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
97 bootinfo->taskmap.tasks[i].name);
98 }
99
100 for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
101 if ((bootinfo->cpumap & (1 << i)) != 0)
102 cpu_count++;
103 }
104
105#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
106 sdram_size = bootinfo->sdram_size;
107#endif
108
109 str_cpy(bargs, CONFIG_BOOT_ARGUMENTS_BUFLEN, bootinfo->bootargs);
110
111 /* Initialize machine_ops pointer. */
112 machine_ops_init();
113}
114
115void mips32_pre_mm_init(void)
116{
117 /* It is not assumed by default */
118 interrupts_disable();
119
120 /* Initialize dispatch table */
121 exception_init();
122
123 /* Copy the exception vectors to the right places */
124 memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
125 smc_coherence(TLB_EXC, EXCEPTION_JUMP_SIZE);
126 memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
127 smc_coherence(NORM_EXC, EXCEPTION_JUMP_SIZE);
128 memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
129 smc_coherence(CACHE_EXC, EXCEPTION_JUMP_SIZE);
130
131 /*
132 * Switch to BEV normal level so that exception vectors point to the
133 * kernel. Clear the error level.
134 */
135 cp0_status_write(cp0_status_read() &
136 ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
137
138 /*
139 * Mask all interrupts
140 */
141 cp0_mask_all_int();
142
143 debugger_init();
144}
145
146void mips32_post_mm_init(void)
147{
148 interrupt_init();
149
150 machine_init();
151 machine_output_init();
152}
153
154void mips32_post_smp_init(void)
155{
156 /* Set platform name. */
157 sysinfo_set_item_data("platform", NULL,
158 (void *) machine_get_platform_name(),
159 str_size(machine_get_platform_name()));
160
161 machine_input_init();
162}
163
164void calibrate_delay_loop(void)
165{
166}
167
168void userspace(uspace_arg_t *kernel_uarg)
169{
170 /* EXL = 1, UM = 1, IE = 1 */
171 cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
172 cp0_status_um_bit | cp0_status_ie_enabled_bit));
173 cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
174 userspace_asm(((uintptr_t) kernel_uarg->uspace_stack +
175 kernel_uarg->uspace_stack_size),
176 (uintptr_t) kernel_uarg->uspace_uarg,
177 (uintptr_t) kernel_uarg->uspace_entry);
178
179 while (true)
180 ;
181}
182
183/** Perform mips32 specific tasks needed before the new task is run. */
184void before_task_runs_arch(void)
185{
186}
187
188/** Perform mips32 specific tasks needed before the new thread is scheduled. */
189void before_thread_runs_arch(void)
190{
191 supervisor_sp =
192 (uintptr_t) &THREAD->kstack[STACK_SIZE];
193}
194
195void after_thread_ran_arch(void)
196{
197}
198
199void arch_reboot(void)
200{
201 ___halt();
202 while (true)
203 ;
204}
205
206/** Construct function pointer
207 *
208 * @param fptr function pointer structure
209 * @param addr function address
210 * @param caller calling function address
211 *
212 * @return address of the function pointer
213 *
214 */
215void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
216{
217 return addr;
218}
219
220void irq_initialize_arch(irq_t *irq)
221{
222 (void) irq;
223}
224
225/** @}
226 */
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