| 1 | /*
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| 2 | * Copyright (c) 2003-2004 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup mips32
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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| 35 | #include <arch.h>
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| 36 | #include <arch/cp0.h>
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| 37 | #include <arch/exception.h>
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| 38 | #include <mm/as.h>
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| 39 |
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| 40 | #include <userspace.h>
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| 41 | #include <arch/console.h>
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| 42 | #include <memstr.h>
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| 43 | #include <proc/thread.h>
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| 44 | #include <proc/uarg.h>
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| 45 | #include <print.h>
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| 46 | #include <syscall/syscall.h>
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| 47 | #include <sysinfo/sysinfo.h>
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| 48 |
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| 49 | #include <arch/interrupt.h>
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| 50 | #include <console/chardev.h>
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| 51 | #include <arch/barrier.h>
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| 52 | #include <arch/debugger.h>
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| 53 | #include <genarch/fb/fb.h>
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| 54 | #include <genarch/fb/visuals.h>
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| 55 | #include <macros.h>
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| 56 | #include <ddi/device.h>
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| 57 |
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| 58 | #include <arch/asm/regname.h>
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| 59 |
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| 60 | /* Size of the code jumping to the exception handler code
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| 61 | * - J+NOP
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| 62 | */
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| 63 | #define EXCEPTION_JUMP_SIZE 8
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| 64 |
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| 65 | #define TLB_EXC ((char *) 0x80000000)
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| 66 | #define NORM_EXC ((char *) 0x80000180)
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| 67 | #define CACHE_EXC ((char *) 0x80000100)
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| 68 |
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| 69 |
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| 70 | /* Why the linker moves the variable 64K away in assembler
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| 71 | * when not in .text section?
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| 72 | */
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| 73 |
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| 74 | /* Stack pointer saved when entering user mode */
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| 75 | uintptr_t supervisor_sp __attribute__ ((section (".text")));
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| 76 |
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| 77 | count_t cpu_count = 0;
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| 78 |
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| 79 | void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
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| 80 | {
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| 81 | /* Setup usermode */
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| 82 | init.cnt = bootinfo->cnt;
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| 83 |
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| 84 | count_t i;
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| 85 | for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
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| 86 | init.tasks[i].addr = bootinfo->tasks[i].addr;
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| 87 | init.tasks[i].size = bootinfo->tasks[i].size;
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| 88 | }
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| 89 |
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| 90 | for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
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| 91 | if ((bootinfo->cpumap & (1 << i)) != 0)
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| 92 | cpu_count++;
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| 93 | }
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| 94 | }
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| 95 |
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| 96 | void arch_pre_mm_init(void)
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| 97 | {
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| 98 | /* It is not assumed by default */
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| 99 | interrupts_disable();
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| 100 |
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| 101 | /* Initialize dispatch table */
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| 102 | exception_init();
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| 103 |
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| 104 | /* Copy the exception vectors to the right places */
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| 105 | memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
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| 106 | smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
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| 107 | memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
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| 108 | smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
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| 109 | memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
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| 110 | smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
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| 111 |
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| 112 | /*
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| 113 | * Switch to BEV normal level so that exception vectors point to the
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| 114 | * kernel. Clear the error level.
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| 115 | */
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| 116 | cp0_status_write(cp0_status_read() &
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| 117 | ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
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| 118 |
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| 119 | /*
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| 120 | * Mask all interrupts
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| 121 | */
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| 122 | cp0_mask_all_int();
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| 123 |
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| 124 | debugger_init();
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| 125 | }
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| 126 |
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| 127 | void arch_post_mm_init(void)
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| 128 | {
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| 129 | interrupt_init();
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| 130 | console_init(device_assign_devno());
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| 131 | #ifdef CONFIG_FB
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| 132 | /* GXemul framebuffer */
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| 133 | fb_properties_t gxemul_prop = {
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| 134 | .addr = 0x12000000,
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| 135 | .offset = 0,
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| 136 | .x = 640,
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| 137 | .y = 480,
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| 138 | .scan = 1920,
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| 139 | .visual = VISUAL_BGR_8_8_8,
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| 140 | };
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| 141 | fb_init(&gxemul_prop);
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| 142 | #endif
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| 143 |
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| 144 | #ifdef MACHINE_msim
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| 145 | sysinfo_set_item_val("machine.msim", NULL, 1);
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| 146 | #endif
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| 147 |
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| 148 | #ifdef MACHINE_simics
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| 149 | sysinfo_set_item_val("machine.simics", NULL, 1);
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| 150 | #endif
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| 151 |
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| 152 | #ifdef MACHINE_bgxemul
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| 153 | sysinfo_set_item_val("machine.bgxemul", NULL, 1);
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| 154 | #endif
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| 155 |
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| 156 | #ifdef MACHINE_lgxemul
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| 157 | sysinfo_set_item_val("machine.lgxemul", NULL, 1);
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| 158 | #endif
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| 159 | }
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| 160 |
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| 161 | void arch_post_cpu_init(void)
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| 162 | {
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| 163 | }
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| 164 |
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| 165 | void arch_pre_smp_init(void)
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| 166 | {
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| 167 | }
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| 168 |
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| 169 | void arch_post_smp_init(void)
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| 170 | {
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| 171 | }
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| 172 |
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| 173 | void calibrate_delay_loop(void)
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| 174 | {
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| 175 | }
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| 176 |
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| 177 | void userspace(uspace_arg_t *kernel_uarg)
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| 178 | {
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| 179 | /* EXL = 1, UM = 1, IE = 1 */
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| 180 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
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| 181 | cp0_status_um_bit | cp0_status_ie_enabled_bit));
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| 182 | cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
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| 183 | userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
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| 184 | (uintptr_t) kernel_uarg->uspace_uarg,
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| 185 | (uintptr_t) kernel_uarg->uspace_entry);
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| 186 |
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| 187 | while (1);
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| 188 | }
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| 189 |
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| 190 | /** Perform mips32 specific tasks needed before the new task is run. */
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| 191 | void before_task_runs_arch(void)
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| 192 | {
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| 193 | }
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| 194 |
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| 195 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */
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| 196 | void before_thread_runs_arch(void)
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| 197 | {
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| 198 | supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
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| 199 | SP_DELTA];
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| 200 | }
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| 201 |
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| 202 | void after_thread_ran_arch(void)
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| 203 | {
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| 204 | }
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| 205 |
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| 206 | /** Set thread-local-storage pointer
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| 207 | *
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| 208 | * We have it currently in K1, it is
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| 209 | * possible to have it separately in the future.
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| 210 | */
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| 211 | unative_t sys_tls_set(unative_t addr)
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| 212 | {
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| 213 | return 0;
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| 214 | }
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| 215 |
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| 216 | void arch_reboot(void)
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| 217 | {
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| 218 | ___halt();
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| 219 |
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| 220 | while (1);
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| 221 | }
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| 222 |
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| 223 | /** Construct function pointer
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| 224 | *
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| 225 | * @param fptr function pointer structure
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| 226 | * @param addr function address
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| 227 | * @param caller calling function address
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| 228 | *
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| 229 | * @return address of the function pointer
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| 230 | *
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| 231 | */
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| 232 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
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| 233 | {
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| 234 | return addr;
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| 235 | }
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| 236 |
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| 237 | /** @}
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| 238 | */
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