source: mainline/kernel/arch/mips32/src/mips32.c@ 76d0981d

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 76d0981d was 76d0981d, checked in by Jiri Svoboda <jiri@…>, 7 years ago

Use proper boolean constant in while loops.

  • Property mode set to 100644
File size: 5.7 KB
Line 
1/*
2 * Copyright (c) 2003-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup mips32
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36#include <arch/arch.h>
37#include <typedefs.h>
38#include <errno.h>
39#include <interrupt.h>
40#include <macros.h>
41#include <str.h>
42#include <mem.h>
43#include <userspace.h>
44#include <stdbool.h>
45#include <syscall/syscall.h>
46#include <sysinfo/sysinfo.h>
47#include <arch/debug.h>
48#include <arch/debugger.h>
49#include <arch/machine_func.h>
50
51/* Size of the code jumping to the exception handler code
52 * - J+NOP
53 */
54#define EXCEPTION_JUMP_SIZE 8
55
56#define TLB_EXC ((char *) 0x80000000)
57#define NORM_EXC ((char *) 0x80000180)
58#define CACHE_EXC ((char *) 0x80000100)
59
60static void mips32_pre_mm_init(void);
61static void mips32_post_mm_init(void);
62static void mips32_post_smp_init(void);
63
64arch_ops_t mips32_ops = {
65 .pre_mm_init = mips32_pre_mm_init,
66 .post_mm_init = mips32_post_mm_init,
67 .post_smp_init = mips32_post_smp_init,
68};
69
70arch_ops_t *arch_ops = &mips32_ops;
71
72/* Why the linker moves the variable 64K away in assembler
73 * when not in .text section?
74 */
75
76/* Stack pointer saved when entering user mode */
77uintptr_t supervisor_sp __attribute__((section(".text")));
78
79size_t cpu_count = 0;
80
81#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
82size_t sdram_size = 0;
83#endif
84
85/** Performs mips32-specific initialization before main_bsp() is called. */
86void mips32_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
87{
88 init.cnt = min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
89
90 size_t i;
91 for (i = 0; i < init.cnt; i++) {
92 init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr);
93 init.tasks[i].size = bootinfo->tasks[i].size;
94 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
95 bootinfo->tasks[i].name);
96 }
97
98 for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
99 if ((bootinfo->cpumap & (1 << i)) != 0)
100 cpu_count++;
101 }
102
103#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
104 sdram_size = bootinfo->sdram_size;
105#endif
106
107 /* Initialize machine_ops pointer. */
108 machine_ops_init();
109}
110
111void mips32_pre_mm_init(void)
112{
113 /* It is not assumed by default */
114 interrupts_disable();
115
116 /* Initialize dispatch table */
117 exception_init();
118
119 /* Copy the exception vectors to the right places */
120 memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
121 smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
122 memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
123 smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
124 memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
125 smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
126
127 /*
128 * Switch to BEV normal level so that exception vectors point to the
129 * kernel. Clear the error level.
130 */
131 cp0_status_write(cp0_status_read() &
132 ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
133
134 /*
135 * Mask all interrupts
136 */
137 cp0_mask_all_int();
138
139 debugger_init();
140}
141
142void mips32_post_mm_init(void)
143{
144 interrupt_init();
145
146 machine_init();
147 machine_output_init();
148}
149
150void mips32_post_smp_init(void)
151{
152 /* Set platform name. */
153 sysinfo_set_item_data("platform", NULL,
154 (void *) machine_get_platform_name(),
155 str_size(machine_get_platform_name()));
156
157 machine_input_init();
158}
159
160void calibrate_delay_loop(void)
161{
162}
163
164void userspace(uspace_arg_t *kernel_uarg)
165{
166 /* EXL = 1, UM = 1, IE = 1 */
167 cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
168 cp0_status_um_bit | cp0_status_ie_enabled_bit));
169 cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
170 userspace_asm(((uintptr_t) kernel_uarg->uspace_stack +
171 kernel_uarg->uspace_stack_size),
172 (uintptr_t) kernel_uarg->uspace_uarg,
173 (uintptr_t) kernel_uarg->uspace_entry);
174
175 while (true)
176 ;
177}
178
179/** Perform mips32 specific tasks needed before the new task is run. */
180void before_task_runs_arch(void)
181{
182}
183
184/** Perform mips32 specific tasks needed before the new thread is scheduled. */
185void before_thread_runs_arch(void)
186{
187 supervisor_sp =
188 (uintptr_t) &THREAD->kstack[STACK_SIZE];
189}
190
191void after_thread_ran_arch(void)
192{
193}
194
195void arch_reboot(void)
196{
197 ___halt();
198 while (true)
199 ;
200}
201
202/** Construct function pointer
203 *
204 * @param fptr function pointer structure
205 * @param addr function address
206 * @param caller calling function address
207 *
208 * @return address of the function pointer
209 *
210 */
211void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
212{
213 return addr;
214}
215
216void irq_initialize_arch(irq_t *irq)
217{
218 (void) irq;
219}
220
221/** @}
222 */
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