/* * Copyright (c) 2003-2004 Jakub Jermar * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * - Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * - Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * - The name of the author may not be used to endorse or promote products * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /** @addtogroup mips32 * @{ */ /** @file */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include /* Size of the code jumping to the exception handler code * - J+NOP */ #define EXCEPTION_JUMP_SIZE 8 #define TLB_EXC ((char *) 0x80000000) #define NORM_EXC ((char *) 0x80000180) #define CACHE_EXC ((char *) 0x80000100) /* Why the linker moves the variable 64K away in assembler * when not in .text section ???????? */ uintptr_t supervisor_sp __attribute__ ((section (".text"))); /* Stack pointer saved when entering user mode */ /* TODO: How do we do it on SMP system???? */ bootinfo_t bootinfo __attribute__ ((section (".text"))); void arch_pre_main(void) { /* Setup usermode */ init.cnt = bootinfo.cnt; uint32_t i; for (i = 0; i < bootinfo.cnt; i++) { init.tasks[i].addr = bootinfo.tasks[i].addr; init.tasks[i].size = bootinfo.tasks[i].size; } } void arch_pre_mm_init(void) { /* It is not assumed by default */ interrupts_disable(); /* Initialize dispatch table */ exception_init(); arc_init(); /* Copy the exception vectors to the right places */ memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE); memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE); memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE); /* * Switch to BEV normal level so that exception vectors point to the kernel. * Clear the error level. */ cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit)); /* * Mask all interrupts */ cp0_mask_all_int(); debugger_init(); } void arch_post_mm_init(void) { interrupt_init(); console_init(device_assign_devno()); #ifdef CONFIG_FB fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); // gxemul framebuffer #endif sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1); } void arch_post_cpu_init(void) { } void arch_pre_smp_init(void) { } void arch_post_smp_init(void) { } void userspace(uspace_arg_t *kernel_uarg) { /* EXL = 1, UM = 1, IE = 1 */ cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | cp0_status_um_bit | cp0_status_ie_enabled_bit)); cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry); userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE), (uintptr_t) kernel_uarg->uspace_uarg, (uintptr_t) kernel_uarg->uspace_entry); while (1); } /** Perform mips32 specific tasks needed before the new task is run. */ void before_task_runs_arch(void) { } /** Perform mips32 specific tasks needed before the new thread is scheduled. */ void before_thread_runs_arch(void) { supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA]; } void after_thread_ran_arch(void) { } /** Set thread-local-storage pointer * * We have it currently in K1, it is * possible to have it separately in the future. */ unative_t sys_tls_set(unative_t addr) { return 0; } void arch_reboot(void) { if (!arc_reboot()) ___halt(); while (1); } /** @} */