source: mainline/kernel/arch/mips32/src/mips32.c@ 3061bc1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3061bc1 was 44a7ee5, checked in by Jiri Svoboda <jiri@…>, 8 years ago

memxxx functions should be provided in the kernel via the same header as in userspace (mem.h).

  • Property mode set to 100644
File size: 5.7 KB
RevLine 
[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2003-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[d227101]29/** @addtogroup mips32
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[f761f1eb]35#include <arch.h>
[36df4109]36#include <arch/arch.h>
[d8db519]37#include <typedefs.h>
38#include <errno.h>
39#include <interrupt.h>
40#include <macros.h>
41#include <str.h>
[44a7ee5]42#include <mem.h>
[d8db519]43#include <userspace.h>
[281b607]44#include <syscall/syscall.h>
[06a583e]45#include <sysinfo/sysinfo.h>
[d8db519]46#include <arch/debug.h>
[5bb8e45]47#include <arch/debugger.h>
[ae7ba7b6]48#include <arch/machine_func.h>
[973be64e]49
[96e0748d]50/* Size of the code jumping to the exception handler code
51 * - J+NOP
[ffc277e]52 */
[96e0748d]53#define EXCEPTION_JUMP_SIZE 8
[ffc277e]54
[96e0748d]55#define TLB_EXC ((char *) 0x80000000)
56#define NORM_EXC ((char *) 0x80000180)
57#define CACHE_EXC ((char *) 0x80000100)
[ffc277e]58
[36df4109]59static void mips32_pre_mm_init(void);
60static void mips32_post_mm_init(void);
61static void mips32_post_smp_init(void);
62
63arch_ops_t mips32_ops = {
64 .pre_mm_init = mips32_pre_mm_init,
65 .post_mm_init = mips32_post_mm_init,
66 .post_smp_init = mips32_post_smp_init,
67};
68
69arch_ops_t *arch_ops = &mips32_ops;
[8449000]70
71/* Why the linker moves the variable 64K away in assembler
[96e0748d]72 * when not in .text section?
[8449000]73 */
[96e0748d]74
[8449000]75/* Stack pointer saved when entering user mode */
[96e0748d]76uintptr_t supervisor_sp __attribute__ ((section (".text")));
[971cf31f]77
[98000fb]78size_t cpu_count = 0;
[96e0748d]79
[bcad855]80#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
81size_t sdram_size = 0;
82#endif
83
[06f96234]84/** Performs mips32-specific initialization before main_bsp() is called. */
[36df4109]85void mips32_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
[12c7f27]86{
[4872160]87 init.cnt = min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
[971cf31f]88
[98000fb]89 size_t i;
[4872160]90 for (i = 0; i < init.cnt; i++) {
[32817cc]91 init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr);
[96e0748d]92 init.tasks[i].size = bootinfo->tasks[i].size;
[f4b1535]93 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
94 bootinfo->tasks[i].name);
[96e0748d]95 }
[971cf31f]96
[96e0748d]97 for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
98 if ((bootinfo->cpumap & (1 << i)) != 0)
99 cpu_count++;
[971cf31f]100 }
[bcad855]101
102#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
103 sdram_size = bootinfo->sdram_size;
104#endif
[260f678]105
106 /* Initialize machine_ops pointer. */
107 machine_ops_init();
[12c7f27]108}
109
[36df4109]110void mips32_pre_mm_init(void)
[f761f1eb]111{
[24241cf]112 /* It is not assumed by default */
[22f7769]113 interrupts_disable();
[973be64e]114
115 /* Initialize dispatch table */
[7a8c866a]116 exception_init();
[3156582]117
[ffc277e]118 /* Copy the exception vectors to the right places */
[7688b5d]119 memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
[c7511ec]120 smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
[7688b5d]121 memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
[c7511ec]122 smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
[7688b5d]123 memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
[c7511ec]124 smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
[7688b5d]125
[f761f1eb]126 /*
[c7511ec]127 * Switch to BEV normal level so that exception vectors point to the
128 * kernel. Clear the error level.
[f761f1eb]129 */
[c7511ec]130 cp0_status_write(cp0_status_read() &
131 ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
[6da1013f]132
133 /*
134 * Mask all interrupts
[24241cf]135 */
136 cp0_mask_all_int();
[6da1013f]137
[5bb8e45]138 debugger_init();
[f761f1eb]139}
[7eade45]140
[36df4109]141void mips32_post_mm_init(void)
[7eade45]142{
[7688b5d]143 interrupt_init();
[260f678]144
145 machine_init();
146 machine_output_init();
[7eade45]147}
[babcb148]148
[36df4109]149void mips32_post_smp_init(void)
[babcb148]150{
[eff1f033]151 /* Set platform name. */
[ae7ba7b6]152 sysinfo_set_item_data("platform", NULL,
153 (void *) machine_get_platform_name(),
154 str_size(machine_get_platform_name()));
[eff1f033]155
[260f678]156 machine_input_init();
[babcb148]157}
[2bd4fdf]158
[7f341820]159void calibrate_delay_loop(void)
160{
161}
162
[0f250f9]163void userspace(uspace_arg_t *kernel_uarg)
[2bd4fdf]164{
[b5ed4f8]165 /* EXL = 1, UM = 1, IE = 1 */
[2bd4fdf]166 cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
[c7511ec]167 cp0_status_um_bit | cp0_status_ie_enabled_bit));
[7f1c620]168 cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
[2902e1bb]169 userspace_asm(((uintptr_t) kernel_uarg->uspace_stack +
170 kernel_uarg->uspace_stack_size),
[c7511ec]171 (uintptr_t) kernel_uarg->uspace_uarg,
172 (uintptr_t) kernel_uarg->uspace_entry);
[b5ed4f8]173
[6da1013f]174 while (1);
[2bd4fdf]175}
176
[39cea6a]177/** Perform mips32 specific tasks needed before the new task is run. */
178void before_task_runs_arch(void)
179{
180}
181
182/** Perform mips32 specific tasks needed before the new thread is scheduled. */
[2bd4fdf]183void before_thread_runs_arch(void)
184{
[26aafe8]185 supervisor_sp =
[2277e03]186 (uintptr_t) &THREAD->kstack[STACK_SIZE];
[2bd4fdf]187}
[97f1691]188
189void after_thread_ran_arch(void)
190{
191}
[281b607]192
[f74bbaf]193void arch_reboot(void)
194{
[edebc15c]195 ___halt();
[6da1013f]196 while (1);
197}
198
199/** Construct function pointer
200 *
201 * @param fptr function pointer structure
202 * @param addr function address
203 * @param caller calling function address
204 *
205 * @return address of the function pointer
206 *
207 */
208void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
209{
210 return addr;
[f74bbaf]211}
212
[3a2f8aa]213void irq_initialize_arch(irq_t *irq)
214{
215 (void) irq;
216}
217
[d227101]218/** @}
[b45c443]219 */
Note: See TracBrowser for help on using the repository browser.