source: mainline/kernel/arch/mips32/src/mips32.c@ 2b95d13

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 2b95d13 was 2b95d13, checked in by Jakub Jermar <jakub@…>, 12 years ago

Merge mainline changes.

  • Property mode set to 100644
File size: 5.6 KB
RevLine 
[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2003-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[d227101]29/** @addtogroup mips32
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[f761f1eb]35#include <arch.h>
[d8db519]36#include <typedefs.h>
37#include <errno.h>
38#include <interrupt.h>
39#include <macros.h>
40#include <str.h>
[ffc277e]41#include <memstr.h>
[d8db519]42#include <userspace.h>
[281b607]43#include <syscall/syscall.h>
[06a583e]44#include <sysinfo/sysinfo.h>
[d8db519]45#include <arch/debug.h>
[5bb8e45]46#include <arch/debugger.h>
[ae7ba7b6]47#include <arch/machine_func.h>
[973be64e]48
[96e0748d]49/* Size of the code jumping to the exception handler code
50 * - J+NOP
[ffc277e]51 */
[96e0748d]52#define EXCEPTION_JUMP_SIZE 8
[ffc277e]53
[96e0748d]54#define TLB_EXC ((char *) 0x80000000)
55#define NORM_EXC ((char *) 0x80000180)
56#define CACHE_EXC ((char *) 0x80000100)
[ffc277e]57
[8449000]58
59/* Why the linker moves the variable 64K away in assembler
[96e0748d]60 * when not in .text section?
[8449000]61 */
[96e0748d]62
[8449000]63/* Stack pointer saved when entering user mode */
[96e0748d]64uintptr_t supervisor_sp __attribute__ ((section (".text")));
[971cf31f]65
[98000fb]66size_t cpu_count = 0;
[96e0748d]67
[bcad855]68#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
69size_t sdram_size = 0;
70#endif
71
[06f96234]72/** Performs mips32-specific initialization before main_bsp() is called. */
[96e0748d]73void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
[12c7f27]74{
[4872160]75 init.cnt = min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
[971cf31f]76
[98000fb]77 size_t i;
[4872160]78 for (i = 0; i < init.cnt; i++) {
[32817cc]79 init.tasks[i].paddr = KA2PA(bootinfo->tasks[i].addr);
[96e0748d]80 init.tasks[i].size = bootinfo->tasks[i].size;
[f4b1535]81 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
82 bootinfo->tasks[i].name);
[96e0748d]83 }
[971cf31f]84
[96e0748d]85 for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
86 if ((bootinfo->cpumap & (1 << i)) != 0)
87 cpu_count++;
[971cf31f]88 }
[bcad855]89
90#if defined(MACHINE_lmalta) || defined(MACHINE_bmalta)
91 sdram_size = bootinfo->sdram_size;
92#endif
[260f678]93
94 /* Initialize machine_ops pointer. */
95 machine_ops_init();
[12c7f27]96}
97
[f07bba5]98void arch_pre_mm_init(void)
[f761f1eb]99{
[24241cf]100 /* It is not assumed by default */
[22f7769]101 interrupts_disable();
[973be64e]102
103 /* Initialize dispatch table */
[7a8c866a]104 exception_init();
[3156582]105
[ffc277e]106 /* Copy the exception vectors to the right places */
[7688b5d]107 memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
[c7511ec]108 smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
[7688b5d]109 memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
[c7511ec]110 smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
[7688b5d]111 memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
[c7511ec]112 smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
[7688b5d]113
[f761f1eb]114 /*
[c7511ec]115 * Switch to BEV normal level so that exception vectors point to the
116 * kernel. Clear the error level.
[f761f1eb]117 */
[c7511ec]118 cp0_status_write(cp0_status_read() &
119 ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
[6da1013f]120
121 /*
122 * Mask all interrupts
[24241cf]123 */
124 cp0_mask_all_int();
[6da1013f]125
[5bb8e45]126 debugger_init();
[f761f1eb]127}
[7eade45]128
129void arch_post_mm_init(void)
130{
[7688b5d]131 interrupt_init();
[260f678]132
133 machine_init();
134 machine_output_init();
[7eade45]135}
[babcb148]136
[26678e5]137void arch_post_cpu_init(void)
138{
139}
140
[7453929]141void arch_pre_smp_init(void)
142{
143}
144
145void arch_post_smp_init(void)
[babcb148]146{
[eff1f033]147 /* Set platform name. */
[ae7ba7b6]148 sysinfo_set_item_data("platform", NULL,
149 (void *) machine_get_platform_name(),
150 str_size(machine_get_platform_name()));
[eff1f033]151
[260f678]152 machine_input_init();
[babcb148]153}
[2bd4fdf]154
[7f341820]155void calibrate_delay_loop(void)
156{
157}
158
[0f250f9]159void userspace(uspace_arg_t *kernel_uarg)
[2bd4fdf]160{
[b5ed4f8]161 /* EXL = 1, UM = 1, IE = 1 */
[2bd4fdf]162 cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
[c7511ec]163 cp0_status_um_bit | cp0_status_ie_enabled_bit));
[7f1c620]164 cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
[2902e1bb]165 userspace_asm(((uintptr_t) kernel_uarg->uspace_stack +
166 kernel_uarg->uspace_stack_size),
[c7511ec]167 (uintptr_t) kernel_uarg->uspace_uarg,
168 (uintptr_t) kernel_uarg->uspace_entry);
[b5ed4f8]169
[6da1013f]170 while (1);
[2bd4fdf]171}
172
[39cea6a]173/** Perform mips32 specific tasks needed before the new task is run. */
174void before_task_runs_arch(void)
175{
176}
177
178/** Perform mips32 specific tasks needed before the new thread is scheduled. */
[2bd4fdf]179void before_thread_runs_arch(void)
180{
[26aafe8]181 supervisor_sp =
[2277e03]182 (uintptr_t) &THREAD->kstack[STACK_SIZE];
[2bd4fdf]183}
[97f1691]184
185void after_thread_ran_arch(void)
186{
187}
[281b607]188
[e1be3b6]189/** Set thread-local-storage pointer
[281b607]190 *
191 * We have it currently in K1, it is
192 * possible to have it separately in the future.
193 */
[d8db519]194sysarg_t sys_tls_set(uintptr_t addr)
[281b607]195{
[d8db519]196 return EOK;
[281b607]197}
[41d33ac]198
[f74bbaf]199void arch_reboot(void)
200{
[edebc15c]201 ___halt();
[6da1013f]202 while (1);
203}
204
205/** Construct function pointer
206 *
207 * @param fptr function pointer structure
208 * @param addr function address
209 * @param caller calling function address
210 *
211 * @return address of the function pointer
212 *
213 */
214void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
215{
216 return addr;
[f74bbaf]217}
218
[3a2f8aa]219void irq_initialize_arch(irq_t *irq)
220{
221 (void) irq;
222}
223
[d227101]224/** @}
[b45c443]225 */
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