[0ca6faa] | 1 | /*
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[54ca3523] | 2 | * Copyright (C) 2005 Jakub Vana
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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[b45c443] | 27 | */
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| 28 |
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| 29 | /** @addtogroup mips32
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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[54ca3523] | 33 | *
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| 34 | */
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[0ca6faa] | 35 |
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| 36 | #include <fpu_context.h>
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[ffc277e] | 37 | #include <arch.h>
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| 38 | #include <arch/cp0.h>
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[3bb9c99] | 39 | #include <proc/thread.h>
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[0ca6faa] | 40 |
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[ffc277e] | 41 | void fpu_disable(void)
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| 42 | {
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[0e24857] | 43 | #ifdef ARCH_HAS_FPU
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[ffc277e] | 44 | cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit);
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| 45 | #endif
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[0ca6faa] | 46 | }
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| 47 |
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[ffc277e] | 48 | void fpu_enable(void)
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[0ca6faa] | 49 | {
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[0e24857] | 50 | #ifdef ARCH_HAS_FPU
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[ffc277e] | 51 | cp0_status_write(cp0_status_read() | cp0_status_fpu_bit);
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| 52 | #endif
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[0ca6faa] | 53 | }
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| 54 |
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[f76fed4] | 55 | void fpu_init()
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[ffc277e] | 56 | {
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| 57 | /* TODO: Zero all registers */
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| 58 | }
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[b45c443] | 59 |
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| 60 | /** @}
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| 61 | */
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| 62 |
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