[f761f1eb] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2003-2004 Jakub Jermar
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[f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[da1bafb] | 29 | /** @addtogroup mips32
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[f761f1eb] | 35 | #include <arch/exception.h>
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[9c0a9b3] | 36 | #include <arch/interrupt.h>
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[b3f8fb7] | 37 | #include <arch/mm/tlb.h>
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[f761f1eb] | 38 | #include <panic.h>
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| 39 | #include <arch/cp0.h>
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[d99c1d2] | 40 | #include <typedefs.h>
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[f761f1eb] | 41 | #include <arch.h>
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[623ba26c] | 42 | #include <debug.h>
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[1084a784] | 43 | #include <proc/thread.h>
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[7a8c866a] | 44 | #include <print.h>
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| 45 | #include <interrupt.h>
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[e07fe0c] | 46 | #include <func.h>
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[7688b5d] | 47 | #include <ddi/irq.h>
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[5bb8e45] | 48 | #include <arch/debugger.h>
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[e2b762ec] | 49 | #include <symtab.h>
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| 50 |
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[a000878c] | 51 | static const char *exctable[] = {
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[2f40fe4] | 52 | "Interrupt",
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| 53 | "TLB Modified",
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| 54 | "TLB Invalid",
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| 55 | "TLB Invalid Store",
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| 56 | "Address Error - load/instr. fetch",
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| 57 | "Address Error - store",
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| 58 | "Bus Error - fetch instruction",
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| 59 | "Bus Error - data reference",
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| 60 | "Syscall",
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| 61 | "BreakPoint",
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| 62 | "Reserved Instruction",
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| 63 | "Coprocessor Unusable",
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| 64 | "Arithmetic Overflow",
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| 65 | "Trap",
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| 66 | "Virtual Coherency - instruction",
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| 67 | "Floating Point",
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| 68 | NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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[da1bafb] | 69 | "WatchHi/WatchLo", /* 23 */
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[2f40fe4] | 70 | NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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| 71 | "Virtual Coherency - data",
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[7a8c866a] | 72 | };
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| 73 |
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[22a28a69] | 74 | void istate_decode(istate_t *istate)
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[7a8c866a] | 75 | {
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[ac11ac7] | 76 | printf("at=%p\tv0=%p\tv1=%p\n", istate->at, istate->v0, istate->v1);
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| 77 | printf("a0=%p\ta1=%p\ta2=%p\n", istate->a0, istate->a1, istate->a2);
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| 78 | printf("a3=%p\tt0=%p\tt1=%p\n", istate->a3, istate->t0, istate->t1);
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| 79 | printf("t2=%p\tt3=%p\tt4=%p\n", istate->t2, istate->t3, istate->t4);
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| 80 | printf("t5=%p\tt6=%p\tt7=%p\n", istate->t5, istate->t6, istate->t7);
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| 81 | printf("t8=%p\tt9=%p\tgp=%p\n", istate->t8, istate->t9, istate->gp);
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| 82 | printf("sp=%p\tra=%p\t\n", istate->sp, istate->ra);
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| 83 | printf("lo=%p\thi=%p\t\n", istate->lo, istate->hi);
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| 84 | printf("cp0_status=%p\tcp0_epc=%p\tk1=%p\n",
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| 85 | istate->status, istate->epc, istate->k1);
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[7a8c866a] | 86 | }
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| 87 |
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[214ec25c] | 88 | static void unhandled_exception(unsigned int n, istate_t *istate)
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[7a8c866a] | 89 | {
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[f651e80] | 90 | fault_if_from_uspace(istate, "Unhandled exception %s.", exctable[n]);
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[ac11ac7] | 91 | panic_badtrap(istate, n, "Unhandled exception %s.", exctable[n]);
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[7a8c866a] | 92 | }
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| 93 |
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[214ec25c] | 94 | static void reserved_instr_exception(unsigned int n, istate_t *istate)
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[3b712407] | 95 | {
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[a000878c] | 96 | if (*((uint32_t *) istate->epc) == 0x7c03e83b) {
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[3b712407] | 97 | ASSERT(THREAD);
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| 98 | istate->epc += 4;
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| 99 | istate->v1 = istate->k1;
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[a000878c] | 100 | } else
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[5201199] | 101 | unhandled_exception(n, istate);
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[3b712407] | 102 | }
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| 103 |
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[214ec25c] | 104 | static void breakpoint_exception(unsigned int n, istate_t *istate)
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[7a8c866a] | 105 | {
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[5bb8e45] | 106 | #ifdef CONFIG_DEBUG
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[25d7709] | 107 | debugger_bpoint(istate);
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[5bb8e45] | 108 | #else
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[7a8c866a] | 109 | /* it is necessary to not re-execute BREAK instruction after
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| 110 | returning from Exception handler
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| 111 | (see page 138 in R4000 Manual for more information) */
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[25d7709] | 112 | istate->epc += 4;
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[5bb8e45] | 113 | #endif
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[7a8c866a] | 114 | }
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| 115 |
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[214ec25c] | 116 | static void tlbmod_exception(unsigned int n, istate_t *istate)
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[7a8c866a] | 117 | {
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[25d7709] | 118 | tlb_modified(istate);
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[7a8c866a] | 119 | }
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| 120 |
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[214ec25c] | 121 | static void tlbinv_exception(unsigned int n, istate_t *istate)
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[7a8c866a] | 122 | {
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[25d7709] | 123 | tlb_invalid(istate);
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[7a8c866a] | 124 | }
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| 125 |
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[5a95b25] | 126 | #ifdef CONFIG_FPU_LAZY
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[214ec25c] | 127 | static void cpuns_exception(unsigned int n, istate_t *istate)
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[7a8c866a] | 128 | {
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| 129 | if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
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| 130 | scheduler_fpu_lazy_request();
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[874621f] | 131 | else {
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[ac11ac7] | 132 | fault_if_from_uspace(istate,
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| 133 | "Unhandled Coprocessor Unusable Exception.");
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| 134 | panic_badtrap(istate, n,
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| 135 | "Unhandled Coprocessor Unusable Exception.");
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[874621f] | 136 | }
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[7a8c866a] | 137 | }
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[5a95b25] | 138 | #endif
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[7a8c866a] | 139 |
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[214ec25c] | 140 | static void interrupt_exception(unsigned int n, istate_t *istate)
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[7a8c866a] | 141 | {
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[da1bafb] | 142 | /* Decode interrupt number and process the interrupt */
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| 143 | uint32_t cause = (cp0_cause_read() >> 8) & 0xff;
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[7a8c866a] | 144 |
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[da1bafb] | 145 | unsigned int i;
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[7688b5d] | 146 | for (i = 0; i < 8; i++) {
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| 147 | if (cause & (1 << i)) {
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| 148 | irq_t *irq = irq_dispatch_and_lock(i);
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| 149 | if (irq) {
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| 150 | /*
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| 151 | * The IRQ handler was found.
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| 152 | */
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[6cd9aa6] | 153 | irq->handler(irq);
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[da1bafb] | 154 | irq_spinlock_unlock(&irq->lock, false);
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[7688b5d] | 155 | } else {
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| 156 | /*
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| 157 | * Spurious interrupt.
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| 158 | */
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| 159 | #ifdef CONFIG_DEBUG
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[214ec25c] | 160 | printf("cpu%u: spurious interrupt (inum=%u)\n",
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[6cd9aa6] | 161 | CPU->id, i);
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[7688b5d] | 162 | #endif
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| 163 | }
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| 164 | }
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| 165 | }
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[7a8c866a] | 166 | }
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| 167 |
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[1b109cb] | 168 | /** Handle syscall userspace call */
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[214ec25c] | 169 | static void syscall_exception(unsigned int n, istate_t *istate)
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[f761f1eb] | 170 | {
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[ac11ac7] | 171 | fault_if_from_uspace(istate, "Syscall is handled through shortcut.");
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[f761f1eb] | 172 | }
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[7a8c866a] | 173 |
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| 174 | void exception_init(void)
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| 175 | {
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[b3b7e14a] | 176 | unsigned int i;
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[da1bafb] | 177 |
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[7a8c866a] | 178 | /* Clear exception table */
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[7688b5d] | 179 | for (i = 0; i < IVT_ITEMS; i++)
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[b3b7e14a] | 180 | exc_register(i, "undef", false,
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| 181 | (iroutine_t) unhandled_exception);
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| 182 |
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| 183 | exc_register(EXC_Bp, "bkpoint", true,
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| 184 | (iroutine_t) breakpoint_exception);
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| 185 | exc_register(EXC_RI, "resinstr", true,
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| 186 | (iroutine_t) reserved_instr_exception);
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| 187 | exc_register(EXC_Mod, "tlb_mod", true,
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| 188 | (iroutine_t) tlbmod_exception);
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| 189 | exc_register(EXC_TLBL, "tlbinvl", true,
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| 190 | (iroutine_t) tlbinv_exception);
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| 191 | exc_register(EXC_TLBS, "tlbinvl", true,
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| 192 | (iroutine_t) tlbinv_exception);
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| 193 | exc_register(EXC_Int, "interrupt", true,
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| 194 | (iroutine_t) interrupt_exception);
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[7688b5d] | 195 |
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[7a8c866a] | 196 | #ifdef CONFIG_FPU_LAZY
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[b3b7e14a] | 197 | exc_register(EXC_CpU, "cpunus", true,
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| 198 | (iroutine_t) cpuns_exception);
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[7a8c866a] | 199 | #endif
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[b3b7e14a] | 200 |
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| 201 | exc_register(EXC_Sys, "syscall", true,
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| 202 | (iroutine_t) syscall_exception);
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[7a8c866a] | 203 | }
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[b45c443] | 204 |
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[3c5006a0] | 205 | /** @}
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[b45c443] | 206 | */
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