[f761f1eb] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2003-2004 Jakub Jermar
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[f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[3c5006a0] | 29 | /** @addtogroup mips32
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[f761f1eb] | 35 | #include <arch/exception.h>
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[9c0a9b3] | 36 | #include <arch/interrupt.h>
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[f761f1eb] | 37 | #include <panic.h>
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| 38 | #include <arch/cp0.h>
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| 39 | #include <arch/types.h>
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| 40 | #include <arch.h>
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[623ba26c] | 41 | #include <debug.h>
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[1084a784] | 42 | #include <proc/thread.h>
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[7a8c866a] | 43 | #include <symtab.h>
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| 44 | #include <print.h>
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| 45 | #include <interrupt.h>
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[e07fe0c] | 46 | #include <func.h>
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| 47 | #include <console/kconsole.h>
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[7688b5d] | 48 | #include <ddi/irq.h>
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[5bb8e45] | 49 | #include <arch/debugger.h>
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[7a8c866a] | 50 |
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| 51 | static char * exctable[] = {
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[2f40fe4] | 52 | "Interrupt",
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| 53 | "TLB Modified",
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| 54 | "TLB Invalid",
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| 55 | "TLB Invalid Store",
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| 56 | "Address Error - load/instr. fetch",
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| 57 | "Address Error - store",
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| 58 | "Bus Error - fetch instruction",
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| 59 | "Bus Error - data reference",
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| 60 | "Syscall",
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| 61 | "BreakPoint",
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| 62 | "Reserved Instruction",
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| 63 | "Coprocessor Unusable",
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| 64 | "Arithmetic Overflow",
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| 65 | "Trap",
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| 66 | "Virtual Coherency - instruction",
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| 67 | "Floating Point",
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| 68 | NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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| 69 | "WatchHi/WatchLo", /* 23 */
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| 70 | NULL, NULL, NULL, NULL, NULL, NULL, NULL,
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| 71 | "Virtual Coherency - data",
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[7a8c866a] | 72 | };
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| 73 |
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[25d7709] | 74 | static void print_regdump(istate_t *istate)
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[7a8c866a] | 75 | {
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| 76 | char *pcsymbol = "";
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| 77 | char *rasymbol = "";
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| 78 |
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[25d7709] | 79 | char *s = get_symtab_entry(istate->epc);
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[7a8c866a] | 80 | if (s)
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| 81 | pcsymbol = s;
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[25d7709] | 82 | s = get_symtab_entry(istate->ra);
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[7a8c866a] | 83 | if (s)
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| 84 | rasymbol = s;
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| 85 |
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[cf85e24c] | 86 | printf("PC: %#x(%s) RA: %#x(%s), SP(%p)\n", istate->epc, pcsymbol, istate->ra, rasymbol, istate->sp);
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[7a8c866a] | 87 | }
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| 88 |
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[25d7709] | 89 | static void unhandled_exception(int n, istate_t *istate)
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[7a8c866a] | 90 | {
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[874621f] | 91 | fault_if_from_uspace(istate, "unhandled exception %s", exctable[n]);
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| 92 |
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[25d7709] | 93 | print_regdump(istate);
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[7a8c866a] | 94 | panic("unhandled exception %s\n", exctable[n]);
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| 95 | }
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| 96 |
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[3b712407] | 97 | static void reserved_instr_exception(int n, istate_t *istate)
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| 98 | {
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[7f1c620] | 99 | if (*((uint32_t *)istate->epc) == 0x7c03e83b) {
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[3b712407] | 100 | ASSERT(THREAD);
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| 101 | istate->epc += 4;
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| 102 | istate->v1 = istate->k1;
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[5201199] | 103 | } else
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| 104 | unhandled_exception(n, istate);
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[3b712407] | 105 | }
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| 106 |
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[25d7709] | 107 | static void breakpoint_exception(int n, istate_t *istate)
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[7a8c866a] | 108 | {
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[5bb8e45] | 109 | #ifdef CONFIG_DEBUG
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[25d7709] | 110 | debugger_bpoint(istate);
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[5bb8e45] | 111 | #else
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[7a8c866a] | 112 | /* it is necessary to not re-execute BREAK instruction after
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| 113 | returning from Exception handler
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| 114 | (see page 138 in R4000 Manual for more information) */
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[25d7709] | 115 | istate->epc += 4;
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[5bb8e45] | 116 | #endif
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[7a8c866a] | 117 | }
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| 118 |
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[25d7709] | 119 | static void tlbmod_exception(int n, istate_t *istate)
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[7a8c866a] | 120 | {
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[25d7709] | 121 | tlb_modified(istate);
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[7a8c866a] | 122 | }
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| 123 |
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[25d7709] | 124 | static void tlbinv_exception(int n, istate_t *istate)
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[7a8c866a] | 125 | {
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[25d7709] | 126 | tlb_invalid(istate);
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[7a8c866a] | 127 | }
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| 128 |
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[5a95b25] | 129 | #ifdef CONFIG_FPU_LAZY
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[25d7709] | 130 | static void cpuns_exception(int n, istate_t *istate)
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[7a8c866a] | 131 | {
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| 132 | if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id)
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| 133 | scheduler_fpu_lazy_request();
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[874621f] | 134 | else {
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| 135 | fault_if_from_uspace(istate, "unhandled Coprocessor Unusable Exception");
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[7a8c866a] | 136 | panic("unhandled Coprocessor Unusable Exception\n");
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[874621f] | 137 | }
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[7a8c866a] | 138 | }
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[5a95b25] | 139 | #endif
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[7a8c866a] | 140 |
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[25d7709] | 141 | static void interrupt_exception(int n, istate_t *istate)
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[7a8c866a] | 142 | {
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[7f1c620] | 143 | uint32_t cause;
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[7a8c866a] | 144 | int i;
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| 145 |
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| 146 | /* decode interrupt number and process the interrupt */
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| 147 | cause = (cp0_cause_read() >> 8) &0xff;
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| 148 |
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[7688b5d] | 149 | for (i = 0; i < 8; i++) {
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| 150 | if (cause & (1 << i)) {
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| 151 | irq_t *irq = irq_dispatch_and_lock(i);
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| 152 | if (irq) {
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| 153 | /*
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| 154 | * The IRQ handler was found.
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| 155 | */
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| 156 | irq->handler(irq, irq->arg);
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| 157 | spinlock_unlock(&irq->lock);
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| 158 | } else {
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| 159 | /*
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| 160 | * Spurious interrupt.
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| 161 | */
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| 162 | #ifdef CONFIG_DEBUG
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| 163 | printf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, i);
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| 164 | #endif
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| 165 | }
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| 166 | }
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| 167 | }
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[7a8c866a] | 168 | }
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| 169 |
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[1b109cb] | 170 | /** Handle syscall userspace call */
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| 171 | static void syscall_exception(int n, istate_t *istate)
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[f761f1eb] | 172 | {
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[1b109cb] | 173 | panic("Syscall is handled through shortcut");
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[f761f1eb] | 174 | }
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[7a8c866a] | 175 |
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| 176 | void exception_init(void)
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| 177 | {
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| 178 | int i;
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| 179 |
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| 180 | /* Clear exception table */
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[7688b5d] | 181 | for (i = 0; i < IVT_ITEMS; i++)
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[49a39c2] | 182 | exc_register(i, "undef", (iroutine) unhandled_exception);
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[7688b5d] | 183 |
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[49a39c2] | 184 | exc_register(EXC_Bp, "bkpoint", (iroutine) breakpoint_exception);
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[3b712407] | 185 | exc_register(EXC_RI, "resinstr", (iroutine) reserved_instr_exception);
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[49a39c2] | 186 | exc_register(EXC_Mod, "tlb_mod", (iroutine) tlbmod_exception);
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| 187 | exc_register(EXC_TLBL, "tlbinvl", (iroutine) tlbinv_exception);
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| 188 | exc_register(EXC_TLBS, "tlbinvl", (iroutine) tlbinv_exception);
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| 189 | exc_register(EXC_Int, "interrupt", (iroutine) interrupt_exception);
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[7a8c866a] | 190 | #ifdef CONFIG_FPU_LAZY
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[49a39c2] | 191 | exc_register(EXC_CpU, "cpunus", (iroutine) cpuns_exception);
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[7a8c866a] | 192 | #endif
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[49a39c2] | 193 | exc_register(EXC_Sys, "syscall", (iroutine) syscall_exception);
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[7a8c866a] | 194 | }
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[b45c443] | 195 |
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[3c5006a0] | 196 | /** @}
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[b45c443] | 197 | */
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