[a7fdfe1] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2005 Ondrej Palkovsky
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[a7fdfe1] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[516ff92] | 29 | /** @addtogroup mips32
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[973be64e] | 35 | #include <interrupt.h>
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[2677758] | 36 | #include <console/chardev.h>
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[973be64e] | 37 | #include <arch/drivers/msim.h>
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[a7fdfe1] | 38 | #include <arch/cp0.h>
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[af9a7c5] | 39 | #include <console/console.h>
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[7688b5d] | 40 | #include <sysinfo/sysinfo.h>
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[113c677] | 41 | #include <ddi/ddi.h>
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[7688b5d] | 42 |
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[973be64e] | 43 | static chardev_t console;
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[7688b5d] | 44 | static irq_t msim_irq;
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[607c5f9] | 45 |
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[b7c4044] | 46 | static void msim_write(chardev_t *dev, const char ch, bool silent);
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[973be64e] | 47 | static void msim_enable(chardev_t *dev);
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| 48 | static void msim_disable(chardev_t *dev);
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[93b84b3] | 49 | static char msim_do_read(chardev_t *dev);
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[ac0cb2a] | 50 |
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| 51 | static chardev_operations_t msim_ops = {
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[973be64e] | 52 | .resume = msim_enable,
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| 53 | .suspend = msim_disable,
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[93b84b3] | 54 | .write = msim_write,
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| 55 | .read = msim_do_read,
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[607c5f9] | 56 | };
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[2677758] | 57 |
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[973be64e] | 58 | /** Putchar that works with MSIM & gxemul */
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[516ff92] | 59 | void msim_write(chardev_t *dev, const char ch, bool silent)
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[a7fdfe1] | 60 | {
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[516ff92] | 61 | if (!silent)
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| 62 | *((char *) MSIM_VIDEORAM) = ch;
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[a7fdfe1] | 63 | }
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| 64 |
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[973be64e] | 65 | /* Called from getc(). */
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| 66 | void msim_enable(chardev_t *dev)
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[a7fdfe1] | 67 | {
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[973be64e] | 68 | cp0_unmask_int(MSIM_KBD_IRQ);
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[2677758] | 69 | }
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| 70 |
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| 71 | /* Called from getc(). */
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[973be64e] | 72 | void msim_disable(chardev_t *dev)
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[2677758] | 73 | {
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[973be64e] | 74 | cp0_mask_int(MSIM_KBD_IRQ);
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[a7fdfe1] | 75 | }
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[607c5f9] | 76 |
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[93b84b3] | 77 | /** Read character using polling, assume interrupts disabled */
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| 78 | static char msim_do_read(chardev_t *dev)
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| 79 | {
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| 80 | char ch;
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[516ff92] | 81 |
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[93b84b3] | 82 | while (1) {
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| 83 | ch = *((volatile char *) MSIM_KBD_ADDRESS);
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| 84 | if (ch) {
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| 85 | if (ch == '\r')
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| 86 | return '\n';
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| 87 | if (ch == 0x7f)
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| 88 | return '\b';
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| 89 | return ch;
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| 90 | }
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| 91 | }
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| 92 | }
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| 93 |
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[973be64e] | 94 | /** Process keyboard interrupt. */
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[6cd9aa6] | 95 | static void msim_irq_handler(irq_t *irq)
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[607c5f9] | 96 | {
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[0c33687a] | 97 | char ch = 0;
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[7688b5d] | 98 |
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[0c33687a] | 99 | ch = *((char *) MSIM_KBD_ADDRESS);
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| 100 | if (ch =='\r')
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| 101 | ch = '\n';
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| 102 | if (ch == 0x7f)
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| 103 | ch = '\b';
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| 104 | chardev_push_character(&console, ch);
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[607c5f9] | 105 | }
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[ac0cb2a] | 106 |
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[c9b550b] | 107 | static irq_ownership_t msim_claim(irq_t *irq)
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[ac0cb2a] | 108 | {
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[7688b5d] | 109 | return IRQ_ACCEPT;
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[ac0cb2a] | 110 | }
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[41d33ac] | 111 |
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| 112 | void msim_kbd_grab(void)
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| 113 | {
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[3dea17f] | 114 | ipl_t ipl = interrupts_disable();
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| 115 | spinlock_lock(&msim_irq.lock);
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[7688b5d] | 116 | msim_irq.notif_cfg.notify = false;
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[3dea17f] | 117 | spinlock_unlock(&msim_irq.lock);
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| 118 | interrupts_restore(ipl);
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[41d33ac] | 119 | }
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[7688b5d] | 120 |
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[41d33ac] | 121 | void msim_kbd_release(void)
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| 122 | {
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[3dea17f] | 123 | ipl_t ipl = interrupts_disable();
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| 124 | spinlock_lock(&msim_irq.lock);
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[7688b5d] | 125 | if (msim_irq.notif_cfg.answerbox)
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| 126 | msim_irq.notif_cfg.notify = true;
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[3dea17f] | 127 | spinlock_unlock(&msim_irq.lock);
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| 128 | interrupts_restore(ipl);
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[7688b5d] | 129 | }
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| 130 |
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| 131 |
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| 132 | /* Return console object representing msim console */
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| 133 | void msim_console(devno_t devno)
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| 134 | {
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| 135 | chardev_initialize("msim_console", &console, &msim_ops);
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| 136 | stdin = &console;
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| 137 | stdout = &console;
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| 138 |
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| 139 | irq_initialize(&msim_irq);
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| 140 | msim_irq.devno = devno;
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| 141 | msim_irq.inr = MSIM_KBD_IRQ;
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| 142 | msim_irq.claim = msim_claim;
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| 143 | msim_irq.handler = msim_irq_handler;
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| 144 | irq_register(&msim_irq);
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| 145 |
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| 146 | cp0_unmask_int(MSIM_KBD_IRQ);
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| 147 |
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| 148 | sysinfo_set_item_val("kbd", NULL, true);
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| 149 | sysinfo_set_item_val("kbd.devno", NULL, devno);
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| 150 | sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ);
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| 151 | sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS);
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[113c677] | 152 |
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| 153 | sysinfo_set_item_val("fb", NULL, true);
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| 154 | sysinfo_set_item_val("fb.kind", NULL, 3);
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| 155 | sysinfo_set_item_val("fb.address.physical", NULL, KA2PA(MSIM_VIDEORAM));
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[41d33ac] | 156 | }
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[b45c443] | 157 |
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[06e1e95] | 158 | /** @}
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[b45c443] | 159 | */
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