| 1 | /*
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| 2 | * Copyright (c) 2003 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | #include <arch/asm/regname.h>
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| 30 | #include <arch/fpu_context_struct.h>
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| 31 |
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| 32 | .text
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| 33 |
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| 34 | .macro cp0_read reg
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| 35 | mfc0 $2, \reg
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| 36 | j $31
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| 37 | nop
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| 38 | .endm
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| 39 |
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| 40 | .macro cp0_write reg
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| 41 | mtc0 $4, \reg
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| 42 | j $31
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| 43 | nop
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| 44 | .endm
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| 45 |
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| 46 | .set noat
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| 47 | .set noreorder
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| 48 | .set nomacro
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| 49 |
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| 50 | .global asm_delay_loop
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| 51 | asm_delay_loop:
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| 52 | j $31
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| 53 | nop
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| 54 |
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| 55 | .global cpu_halt
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| 56 | cpu_halt:
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| 57 | j cpu_halt
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| 58 | nop
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| 59 |
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| 60 | .global memcpy_from_uspace
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| 61 | .global memcpy_to_uspace
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| 62 | .global memcpy_from_uspace_failover_address
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| 63 | .global memcpy_to_uspace_failover_address
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| 64 | memcpy_from_uspace:
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| 65 | memcpy_to_uspace:
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| 66 | move $t2, $a0 /* save dst */
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| 67 |
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| 68 | addiu $v0, $a1, 3
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| 69 | li $v1, -4 /* 0xfffffffffffffffc */
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| 70 | and $v0, $v0, $v1
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| 71 | beq $a1, $v0, 3f
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| 72 | move $t0, $a0
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| 73 |
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| 74 | 0:
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| 75 | beq $a2, $zero, 2f
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| 76 | move $a3, $zero
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| 77 |
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| 78 | 1:
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| 79 | addu $v0, $a1, $a3
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| 80 | lbu $a0, 0($v0)
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| 81 | addu $v1, $t0, $a3
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| 82 | addiu $a3, $a3, 1
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| 83 | bne $a3, $a2, 1b
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| 84 | sb $a0, 0($v1)
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| 85 |
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| 86 | 2:
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| 87 | jr $ra
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| 88 | move $v0, $t2
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| 89 |
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| 90 | 3:
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| 91 | addiu $v0, $a0, 3
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| 92 | and $v0, $v0, $v1
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| 93 | bne $a0, $v0, 0b
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| 94 | srl $t1, $a2, 2
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| 95 |
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| 96 | beq $t1, $zero, 5f
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| 97 | move $a3, $zero
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| 98 |
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| 99 | move $a3, $zero
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| 100 | move $a0, $zero
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| 101 |
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| 102 | 4:
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| 103 | addu $v0, $a1, $a0
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| 104 | lw $v1, 0($v0)
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| 105 | addiu $a3, $a3, 1
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| 106 | addu $v0, $t0, $a0
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| 107 | sw $v1, 0($v0)
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| 108 | bne $a3, $t1, 4b
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| 109 | addiu $a0, $a0, 4
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| 110 |
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| 111 | 5:
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| 112 | andi $a2, $a2, 0x3
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| 113 | beq $a2, $zero, 2b
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| 114 | nop
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| 115 |
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| 116 | sll $v0, $a3, 2
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| 117 | addu $t1, $v0, $t0
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| 118 | move $a3, $zero
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| 119 | addu $t0, $v0, $a1
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| 120 |
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| 121 | 6:
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| 122 | addu $v0, $t0, $a3
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| 123 | lbu $a0, 0($v0)
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| 124 | addu $v1, $t1, $a3
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| 125 | addiu $a3, $a3, 1
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| 126 | bne $a3, $a2, 6b
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| 127 | sb $a0, 0($v1)
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| 128 |
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| 129 | jr $ra
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| 130 | move $v0, $t2
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| 131 |
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| 132 | memcpy_from_uspace_failover_address:
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| 133 | memcpy_to_uspace_failover_address:
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| 134 | jr $ra
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| 135 | move $v0, $zero
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| 136 |
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| 137 | .macro fpu_gp_save reg ctx
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| 138 | mfc1 $t0, $\reg
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| 139 | sw $t0, FPU_CONTEXT_OFFSET_DREGS + \reg * FPU_CONTEXT_DREGS_ITEM_SIZE(\ctx)
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| 140 | .endm
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| 141 |
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| 142 | .macro fpu_gp_restore reg ctx
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| 143 | lw $t0, FPU_CONTEXT_OFFSET_DREGS + \reg * FPU_CONTEXT_DREGS_ITEM_SIZE(\ctx)
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| 144 | mtc1 $t0, $\reg
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| 145 | .endm
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| 146 |
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| 147 | .macro fpu_ct_save reg ctx
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| 148 | cfc1 $t0, $1
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| 149 | sw $t0, FPU_CONTEXT_OFFSET_CREGS + \reg * FPU_CONTEXT_CREGS_ITEM_SIZE(\ctx)
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| 150 | .endm
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| 151 |
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| 152 | .macro fpu_ct_restore reg ctx
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| 153 | lw $t0, FPU_CONTEXT_OFFSET_CREGS + \reg * FPU_CONTEZT_CREGS_ITEM_SIZE(\ctx)
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| 154 | ctc1 $t0, $\reg
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| 155 | .endm
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| 156 |
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| 157 | .global fpu_context_save
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| 158 | fpu_context_save:
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| 159 | #ifdef CONFIG_FPU
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| 160 | fpu_gp_save 0, $a0
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| 161 | fpu_gp_save 1, $a0
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| 162 | fpu_gp_save 2, $a0
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| 163 | fpu_gp_save 3, $a0
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| 164 | fpu_gp_save 4, $a0
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| 165 | fpu_gp_save 5, $a0
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| 166 | fpu_gp_save 6, $a0
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| 167 | fpu_gp_save 7, $a0
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| 168 | fpu_gp_save 8, $a0
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| 169 | fpu_gp_save 9, $a0
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| 170 | fpu_gp_save 10, $a0
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| 171 | fpu_gp_save 11, $a0
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| 172 | fpu_gp_save 12, $a0
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| 173 | fpu_gp_save 13, $a0
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| 174 | fpu_gp_save 14, $a0
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| 175 | fpu_gp_save 15, $a0
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| 176 | fpu_gp_save 16, $a0
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| 177 | fpu_gp_save 17, $a0
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| 178 | fpu_gp_save 18, $a0
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| 179 | fpu_gp_save 19, $a0
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| 180 | fpu_gp_save 20, $a0
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| 181 | fpu_gp_save 21, $a0
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| 182 | fpu_gp_save 22, $a0
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| 183 | fpu_gp_save 23, $a0
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| 184 | fpu_gp_save 24, $a0
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| 185 | fpu_gp_save 25, $a0
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| 186 | fpu_gp_save 26, $a0
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| 187 | fpu_gp_save 27, $a0
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| 188 | fpu_gp_save 28, $a0
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| 189 | fpu_gp_save 29, $a0
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| 190 | fpu_gp_save 30, $a0
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| 191 | fpu_gp_save 31, $a0
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| 192 |
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| 193 | fpu_ct_save 1, $a0
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| 194 | fpu_ct_save 2, $a0
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| 195 | fpu_ct_save 3, $a0
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| 196 | fpu_ct_save 4, $a0
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| 197 | fpu_ct_save 5, $a0
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| 198 | fpu_ct_save 6, $a0
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| 199 | fpu_ct_save 7, $a0
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| 200 | fpu_ct_save 8, $a0
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| 201 | fpu_ct_save 9, $a0
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| 202 | fpu_ct_save 10, $a0
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| 203 | fpu_ct_save 11, $a0
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| 204 | fpu_ct_save 12, $a0
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| 205 | fpu_ct_save 13, $a0
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| 206 | fpu_ct_save 14, $a0
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| 207 | fpu_ct_save 15, $a0
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| 208 | fpu_ct_save 16, $a0
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| 209 | fpu_ct_save 17, $a0
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| 210 | fpu_ct_save 18, $a0
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| 211 | fpu_ct_save 19, $a0
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| 212 | fpu_ct_save 20, $a0
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| 213 | fpu_ct_save 21, $a0
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| 214 | fpu_ct_save 22, $a0
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| 215 | fpu_ct_save 23, $a0
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| 216 | fpu_ct_save 24, $a0
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| 217 | fpu_ct_save 25, $a0
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| 218 | fpu_ct_save 26, $a0
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| 219 | fpu_ct_save 27, $a0
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| 220 | fpu_ct_save 28, $a0
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| 221 | fpu_ct_save 29, $a0
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| 222 | fpu_ct_save 30, $a0
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| 223 | fpu_ct_save 31, $a0
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| 224 | #endif
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| 225 | j $ra
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| 226 | nop
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| 227 |
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| 228 | .global fpu_context_restore
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| 229 | fpu_context_restore:
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| 230 | #ifdef CONFIG_FPU
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| 231 | fpu_gp_restore 0, $a0
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| 232 | fpu_gp_restore 1, $a0
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| 233 | fpu_gp_restore 2, $a0
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| 234 | fpu_gp_restore 3, $a0
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| 235 | fpu_gp_restore 4, $a0
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| 236 | fpu_gp_restore 5, $a0
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| 237 | fpu_gp_restore 6, $a0
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| 238 | fpu_gp_restore 7, $a0
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| 239 | fpu_gp_restore 8, $a0
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| 240 | fpu_gp_restore 9, $a0
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| 241 | fpu_gp_restore 10, $a0
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| 242 | fpu_gp_restore 11, $a0
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| 243 | fpu_gp_restore 12, $a0
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| 244 | fpu_gp_restore 13, $a0
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| 245 | fpu_gp_restore 14, $a0
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| 246 | fpu_gp_restore 15, $a0
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| 247 | fpu_gp_restore 16, $a0
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| 248 | fpu_gp_restore 17, $a0
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| 249 | fpu_gp_restore 18, $a0
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| 250 | fpu_gp_restore 19, $a0
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| 251 | fpu_gp_restore 20, $a0
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| 252 | fpu_gp_restore 21, $a0
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| 253 | fpu_gp_restore 22, $a0
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| 254 | fpu_gp_restore 23, $a0
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| 255 | fpu_gp_restore 24, $a0
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| 256 | fpu_gp_restore 25, $a0
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| 257 | fpu_gp_restore 26, $a0
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| 258 | fpu_gp_restore 27, $a0
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| 259 | fpu_gp_restore 28, $a0
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| 260 | fpu_gp_restore 29, $a0
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| 261 | fpu_gp_restore 30, $a0
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| 262 | fpu_gp_restore 31, $a0
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| 263 |
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| 264 | fpu_ct_restore 1, $a0
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| 265 | fpu_ct_restore 2, $a0
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| 266 | fpu_ct_restore 3, $a0
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| 267 | fpu_ct_restore 4, $a0
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| 268 | fpu_ct_restore 5, $a0
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| 269 | fpu_ct_restore 6, $a0
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| 270 | fpu_ct_restore 7, $a0
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| 271 | fpu_ct_restore 8, $a0
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| 272 | fpu_ct_restore 9, $a0
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| 273 | fpu_ct_restore 10, $a0
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| 274 | fpu_ct_restore 11, $a0
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| 275 | fpu_ct_restore 12, $a0
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| 276 | fpu_ct_restore 13, $a0
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| 277 | fpu_ct_restore 14, $a0
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| 278 | fpu_ct_restore 15, $a0
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| 279 | fpu_ct_restore 16, $a0
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| 280 | fpu_ct_restore 17, $a0
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| 281 | fpu_ct_restore 18, $a0
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| 282 | fpu_ct_restore 19, $a0
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| 283 | fpu_ct_restore 20, $a0
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| 284 | fpu_ct_restore 21, $a0
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| 285 | fpu_ct_restore 22, $a0
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| 286 | fpu_ct_restore 23, $a0
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| 287 | fpu_ct_restore 24, $a0
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| 288 | fpu_ct_restore 25, $a0
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| 289 | fpu_ct_restore 26, $a0
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| 290 | fpu_ct_restore 27, $a0
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| 291 | fpu_ct_restore 28, $a0
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| 292 | fpu_ct_restore 29, $a0
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| 293 | fpu_ct_restore 30, $a0
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| 294 | fpu_ct_restore 31, $a0
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| 295 | #endif
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| 296 | j $ra
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| 297 | nop
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| 298 |
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| 299 | .global early_putchar
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| 300 | early_putchar:
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| 301 | j $ra
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| 302 | nop
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