source: mainline/kernel/arch/mips32/src/asm.S@ a35b458

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since a35b458 was a35b458, checked in by Jiří Zárevúcky <zarevucky.jiri@…>, 7 years ago

style: Remove trailing whitespace on _all_ lines, including empty ones, for particular file types.

Command used: tools/srepl '\s\+$' '' -- *.c *.h *.py *.sh *.s *.S *.ag

Currently, whitespace on empty lines is very inconsistent.
There are two basic choices: Either remove the whitespace, or keep empty lines
indented to the level of surrounding code. The former is AFAICT more common,
and also much easier to do automatically.

Alternatively, we could write script for automatic indentation, and use that
instead. However, if such a script exists, it's possible to use the indented
style locally, by having the editor apply relevant conversions on load/save,
without affecting remote repository. IMO, it makes more sense to adopt
the simpler rule.
  • Property mode set to 100644
File size: 6.5 KB
Line 
1/*
2 * Copyright (c) 2003 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <abi/asmtool.h>
30#include <arch/asm/regname.h>
31#include <arch/fpu_context_struct.h>
32
33.text
34
35.macro cp0_read reg
36 mfc0 $2, \reg
37 j $31
38 nop
39.endm
40
41.macro cp0_write reg
42 mtc0 $4, \reg
43 j $31
44 nop
45.endm
46
47.set noat
48.set noreorder
49.set nomacro
50
51FUNCTION_BEGIN(asm_delay_loop)
52 j $31
53 nop
54FUNCTION_END(asm_delay_loop)
55
56FUNCTION_BEGIN(cpu_halt)
57 j cpu_halt
58 nop
59FUNCTION_END(cpu_halt)
60
61FUNCTION_BEGIN(memcpy_from_uspace)
62FUNCTION_BEGIN(memcpy_to_uspace)
63 move $t2, $a0 /* save dst */
64
65 addiu $v0, $a1, 3
66 li $v1, -4 /* 0xfffffffffffffffc */
67 and $v0, $v0, $v1
68 beq $a1, $v0, 3f
69 move $t0, $a0
70
71 0:
72 beq $a2, $zero, 2f
73 move $a3, $zero
74
75 1:
76 addu $v0, $a1, $a3
77 lbu $a0, 0($v0)
78 addu $v1, $t0, $a3
79 addiu $a3, $a3, 1
80 bne $a3, $a2, 1b
81 sb $a0, 0($v1)
82
83 2:
84 jr $ra
85 move $v0, $t2
86
87 3:
88 addiu $v0, $a0, 3
89 and $v0, $v0, $v1
90 bne $a0, $v0, 0b
91 srl $t1, $a2, 2
92
93 beq $t1, $zero, 5f
94 move $a3, $zero
95
96 move $a3, $zero
97 move $a0, $zero
98
99 4:
100 addu $v0, $a1, $a0
101 lw $v1, 0($v0)
102 addiu $a3, $a3, 1
103 addu $v0, $t0, $a0
104 sw $v1, 0($v0)
105 bne $a3, $t1, 4b
106 addiu $a0, $a0, 4
107
108 5:
109 andi $a2, $a2, 0x3
110 beq $a2, $zero, 2b
111 nop
112
113 sll $v0, $a3, 2
114 addu $t1, $v0, $t0
115 move $a3, $zero
116 addu $t0, $v0, $a1
117
118 6:
119 addu $v0, $t0, $a3
120 lbu $a0, 0($v0)
121 addu $v1, $t1, $a3
122 addiu $a3, $a3, 1
123 bne $a3, $a2, 6b
124 sb $a0, 0($v1)
125
126 jr $ra
127 move $v0, $t2
128FUNCTION_END(memcpy_from_uspace)
129FUNCTION_END(memcpy_to_uspace)
130
131SYMBOL(memcpy_from_uspace_failover_address)
132SYMBOL(memcpy_to_uspace_failover_address)
133 jr $ra
134 move $v0, $zero
135
136.macro fpu_gp_save reg ctx
137 mfc1 $t0, $\reg
138 sw $t0, FPU_CONTEXT_OFFSET_DREGS + \reg * FPU_CONTEXT_DREGS_ITEM_SIZE(\ctx)
139.endm
140
141.macro fpu_gp_restore reg ctx
142 lw $t0, FPU_CONTEXT_OFFSET_DREGS + \reg * FPU_CONTEXT_DREGS_ITEM_SIZE(\ctx)
143 mtc1 $t0, $\reg
144.endm
145
146.macro fpu_ct_save reg ctx
147 cfc1 $t0, $1
148 sw $t0, FPU_CONTEXT_OFFSET_CREGS + \reg * FPU_CONTEXT_CREGS_ITEM_SIZE(\ctx)
149.endm
150
151.macro fpu_ct_restore reg ctx
152 lw $t0, FPU_CONTEXT_OFFSET_CREGS + \reg * FPU_CONTEZT_CREGS_ITEM_SIZE(\ctx)
153 ctc1 $t0, $\reg
154.endm
155
156FUNCTION_BEGIN(fpu_context_save)
157#ifdef CONFIG_FPU
158 fpu_gp_save 0, $a0
159 fpu_gp_save 1, $a0
160 fpu_gp_save 2, $a0
161 fpu_gp_save 3, $a0
162 fpu_gp_save 4, $a0
163 fpu_gp_save 5, $a0
164 fpu_gp_save 6, $a0
165 fpu_gp_save 7, $a0
166 fpu_gp_save 8, $a0
167 fpu_gp_save 9, $a0
168 fpu_gp_save 10, $a0
169 fpu_gp_save 11, $a0
170 fpu_gp_save 12, $a0
171 fpu_gp_save 13, $a0
172 fpu_gp_save 14, $a0
173 fpu_gp_save 15, $a0
174 fpu_gp_save 16, $a0
175 fpu_gp_save 17, $a0
176 fpu_gp_save 18, $a0
177 fpu_gp_save 19, $a0
178 fpu_gp_save 20, $a0
179 fpu_gp_save 21, $a0
180 fpu_gp_save 22, $a0
181 fpu_gp_save 23, $a0
182 fpu_gp_save 24, $a0
183 fpu_gp_save 25, $a0
184 fpu_gp_save 26, $a0
185 fpu_gp_save 27, $a0
186 fpu_gp_save 28, $a0
187 fpu_gp_save 29, $a0
188 fpu_gp_save 30, $a0
189 fpu_gp_save 31, $a0
190
191 fpu_ct_save 1, $a0
192 fpu_ct_save 2, $a0
193 fpu_ct_save 3, $a0
194 fpu_ct_save 4, $a0
195 fpu_ct_save 5, $a0
196 fpu_ct_save 6, $a0
197 fpu_ct_save 7, $a0
198 fpu_ct_save 8, $a0
199 fpu_ct_save 9, $a0
200 fpu_ct_save 10, $a0
201 fpu_ct_save 11, $a0
202 fpu_ct_save 12, $a0
203 fpu_ct_save 13, $a0
204 fpu_ct_save 14, $a0
205 fpu_ct_save 15, $a0
206 fpu_ct_save 16, $a0
207 fpu_ct_save 17, $a0
208 fpu_ct_save 18, $a0
209 fpu_ct_save 19, $a0
210 fpu_ct_save 20, $a0
211 fpu_ct_save 21, $a0
212 fpu_ct_save 22, $a0
213 fpu_ct_save 23, $a0
214 fpu_ct_save 24, $a0
215 fpu_ct_save 25, $a0
216 fpu_ct_save 26, $a0
217 fpu_ct_save 27, $a0
218 fpu_ct_save 28, $a0
219 fpu_ct_save 29, $a0
220 fpu_ct_save 30, $a0
221 fpu_ct_save 31, $a0
222#endif
223 j $ra
224 nop
225FUNCTION_END(fpu_context_save)
226
227FUNCTION_BEGIN(fpu_context_restore)
228#ifdef CONFIG_FPU
229 fpu_gp_restore 0, $a0
230 fpu_gp_restore 1, $a0
231 fpu_gp_restore 2, $a0
232 fpu_gp_restore 3, $a0
233 fpu_gp_restore 4, $a0
234 fpu_gp_restore 5, $a0
235 fpu_gp_restore 6, $a0
236 fpu_gp_restore 7, $a0
237 fpu_gp_restore 8, $a0
238 fpu_gp_restore 9, $a0
239 fpu_gp_restore 10, $a0
240 fpu_gp_restore 11, $a0
241 fpu_gp_restore 12, $a0
242 fpu_gp_restore 13, $a0
243 fpu_gp_restore 14, $a0
244 fpu_gp_restore 15, $a0
245 fpu_gp_restore 16, $a0
246 fpu_gp_restore 17, $a0
247 fpu_gp_restore 18, $a0
248 fpu_gp_restore 19, $a0
249 fpu_gp_restore 20, $a0
250 fpu_gp_restore 21, $a0
251 fpu_gp_restore 22, $a0
252 fpu_gp_restore 23, $a0
253 fpu_gp_restore 24, $a0
254 fpu_gp_restore 25, $a0
255 fpu_gp_restore 26, $a0
256 fpu_gp_restore 27, $a0
257 fpu_gp_restore 28, $a0
258 fpu_gp_restore 29, $a0
259 fpu_gp_restore 30, $a0
260 fpu_gp_restore 31, $a0
261
262 fpu_ct_restore 1, $a0
263 fpu_ct_restore 2, $a0
264 fpu_ct_restore 3, $a0
265 fpu_ct_restore 4, $a0
266 fpu_ct_restore 5, $a0
267 fpu_ct_restore 6, $a0
268 fpu_ct_restore 7, $a0
269 fpu_ct_restore 8, $a0
270 fpu_ct_restore 9, $a0
271 fpu_ct_restore 10, $a0
272 fpu_ct_restore 11, $a0
273 fpu_ct_restore 12, $a0
274 fpu_ct_restore 13, $a0
275 fpu_ct_restore 14, $a0
276 fpu_ct_restore 15, $a0
277 fpu_ct_restore 16, $a0
278 fpu_ct_restore 17, $a0
279 fpu_ct_restore 18, $a0
280 fpu_ct_restore 19, $a0
281 fpu_ct_restore 20, $a0
282 fpu_ct_restore 21, $a0
283 fpu_ct_restore 22, $a0
284 fpu_ct_restore 23, $a0
285 fpu_ct_restore 24, $a0
286 fpu_ct_restore 25, $a0
287 fpu_ct_restore 26, $a0
288 fpu_ct_restore 27, $a0
289 fpu_ct_restore 28, $a0
290 fpu_ct_restore 29, $a0
291 fpu_ct_restore 30, $a0
292 fpu_ct_restore 31, $a0
293#endif
294 j $ra
295 nop
296FUNCTION_END(fpu_context_restore)
297
298FUNCTION_BEGIN(early_putchar)
299 j $ra
300 nop
301FUNCTION_END(early_putchar)
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