source: mainline/kernel/arch/mips32/include/istate.h@ 0fb70e1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 0fb70e1 was c0699467, checked in by Martin Decky <martin@…>, 14 years ago

do not provide general access to kernel headers from uspace, only allow specific headers to be accessed or shared
externalize headers which serve as kernel/uspace API/ABI into a special tree

  • Property mode set to 100644
File size: 3.0 KB
Line 
1/*
2 * Copyright (c) 2003-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup mips32interrupt
30 * @{
31 */
32/** @file
33 */
34
35#ifndef KERN_mips32_ISTATE_H_
36#define KERN_mips32_ISTATE_H_
37
38#include <trace.h>
39
40#ifdef KERNEL
41
42#include <arch/cp0.h>
43
44#else /* KERNEL */
45
46#include <libarch/cp0.h>
47
48#endif /* KERNEL */
49
50typedef struct istate {
51 /*
52 * The first seven registers are arranged so that the istate structure
53 * can be used both for exception handlers and for the syscall handler.
54 */
55 uint32_t a0; /* arg1 */
56 uint32_t a1; /* arg2 */
57 uint32_t a2; /* arg3 */
58 uint32_t a3; /* arg4 */
59 uint32_t t0; /* arg5 */
60 uint32_t t1; /* arg6 */
61 uint32_t v0; /* arg7 */
62 uint32_t v1;
63 uint32_t at;
64 uint32_t t2;
65 uint32_t t3;
66 uint32_t t4;
67 uint32_t t5;
68 uint32_t t6;
69 uint32_t t7;
70 uint32_t s0;
71 uint32_t s1;
72 uint32_t s2;
73 uint32_t s3;
74 uint32_t s4;
75 uint32_t s5;
76 uint32_t s6;
77 uint32_t s7;
78 uint32_t t8;
79 uint32_t t9;
80 uint32_t kt0;
81 uint32_t kt1; /* We use it as thread-local pointer */
82 uint32_t gp;
83 uint32_t sp;
84 uint32_t s8;
85 uint32_t ra;
86
87 uint32_t lo;
88 uint32_t hi;
89
90 uint32_t status; /* cp0_status */
91 uint32_t epc; /* cp0_epc */
92
93 uint32_t alignment; /* to make sizeof(istate_t) a multiple of 8 */
94} istate_t;
95
96NO_TRACE static inline void istate_set_retaddr(istate_t *istate,
97 uintptr_t retaddr)
98{
99 istate->epc = retaddr;
100}
101
102/** Return true if exception happened while in userspace */
103NO_TRACE static inline int istate_from_uspace(istate_t *istate)
104{
105 return istate->status & cp0_status_um_bit;
106}
107
108NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate)
109{
110 return istate->epc;
111}
112
113NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate)
114{
115 return istate->sp;
116}
117
118#endif
119
120/** @}
121 */
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