source: mainline/kernel/arch/mips32/include/exception.h@ e1f0fe9

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since e1f0fe9 was e1f0fe9, checked in by Jakub Jermar <jakub@…>, 15 years ago

Dummy support for mips32 kernel stack traces.

  • Property mode set to 100644
File size: 3.0 KB
Line 
1/*
2 * Copyright (c) 2003-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup mips32
30 * @{
31 */
32/** @file
33 */
34
35#ifndef KERN_mips32_EXCEPTION_H_
36#define KERN_mips32_EXCEPTION_H_
37
38#include <arch/types.h>
39#include <arch/cp0.h>
40
41#define EXC_Int 0
42#define EXC_Mod 1
43#define EXC_TLBL 2
44#define EXC_TLBS 3
45#define EXC_AdEL 4
46#define EXC_AdES 5
47#define EXC_IBE 6
48#define EXC_DBE 7
49#define EXC_Sys 8
50#define EXC_Bp 9
51#define EXC_RI 10
52#define EXC_CpU 11
53#define EXC_Ov 12
54#define EXC_Tr 13
55#define EXC_VCEI 14
56#define EXC_FPE 15
57#define EXC_WATCH 23
58#define EXC_VCED 31
59
60typedef struct istate {
61 uint32_t at;
62 uint32_t v0;
63 uint32_t v1;
64 uint32_t a0;
65 uint32_t a1;
66 uint32_t a2;
67 uint32_t a3;
68 uint32_t t0;
69 uint32_t t1;
70 uint32_t t2;
71 uint32_t t3;
72 uint32_t t4;
73 uint32_t t5;
74 uint32_t t6;
75 uint32_t t7;
76 uint32_t t8;
77 uint32_t t9;
78 uint32_t gp;
79 uint32_t sp;
80 uint32_t ra;
81
82 uint32_t lo;
83 uint32_t hi;
84
85 uint32_t status; /* cp0_status */
86 uint32_t epc; /* cp0_epc */
87 uint32_t k1; /* We use it as thread-local pointer */
88} istate_t;
89
90static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
91{
92 istate->epc = retaddr;
93}
94
95/** Return true if exception happened while in userspace */
96static inline int istate_from_uspace(istate_t *istate)
97{
98 return istate->status & cp0_status_um_bit;
99}
100static inline unative_t istate_get_pc(istate_t *istate)
101{
102 return istate->epc;
103}
104static inline unative_t istate_get_fp(istate_t *istate)
105{
106 return 0; /* FIXME */
107}
108
109extern void exception(istate_t *istate);
110extern void tlb_refill_entry(void);
111extern void exception_entry(void);
112extern void cache_error_entry(void);
113extern void exception_init(void);
114
115#endif
116
117/** @}
118 */
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