source: mainline/kernel/arch/mips32/include/context_offset.h@ c0699467

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since c0699467 was c0699467, checked in by Martin Decky <martin@…>, 14 years ago

do not provide general access to kernel headers from uspace, only allow specific headers to be accessed or shared
externalize headers which serve as kernel/uspace API/ABI into a special tree

  • Property mode set to 100644
File size: 4.3 KB
RevLine 
[78595d6]1/*
[df4ed85]2 * Copyright (c) 2005 Martin Decky
[78595d6]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#ifndef KERN_mips32_CONTEXT_OFFSET_H_
30#define KERN_mips32_CONTEXT_OFFSET_H_
31
[6f8a426]32#define OFFSET_SP 0x0
33#define OFFSET_PC 0x4
34#define OFFSET_S0 0x8
35#define OFFSET_S1 0xc
36#define OFFSET_S2 0x10
37#define OFFSET_S3 0x14
38#define OFFSET_S4 0x18
39#define OFFSET_S5 0x1c
40#define OFFSET_S6 0x20
41#define OFFSET_S7 0x24
42#define OFFSET_S8 0x28
43#define OFFSET_GP 0x2c
[389f41e]44
[308cdd1]45#ifdef KERNEL
46# define OFFSET_IPL 0x30
47#else
48# define OFFSET_TLS 0x30
49
50# define OFFSET_F20 0x34
51# define OFFSET_F21 0x38
52# define OFFSET_F22 0x3c
53# define OFFSET_F23 0x40
54# define OFFSET_F24 0x44
55# define OFFSET_F25 0x48
56# define OFFSET_F26 0x4c
57# define OFFSET_F27 0x50
58# define OFFSET_F28 0x54
59# define OFFSET_F29 0x58
60# define OFFSET_F30 0x5c
61#endif /* KERNEL */
62
63#ifdef __ASM__
64
[c0699467]65#ifdef KERNEL
66
[308cdd1]67#include <arch/asm/regname.h>
68
[c0699467]69#else /* KERNEL */
[308cdd1]70
[c0699467]71#include <libarch/regname.h>
[308cdd1]72
[c0699467]73#endif /* KERNEL */
74
75/* ctx: address of the structure with saved context */
76.macro CONTEXT_SAVE_ARCH_CORE ctx:req
77 sw $s0, OFFSET_S0(\ctx)
78 sw $s1, OFFSET_S1(\ctx)
79 sw $s2, OFFSET_S2(\ctx)
80 sw $s3, OFFSET_S3(\ctx)
81 sw $s4, OFFSET_S4(\ctx)
82 sw $s5, OFFSET_S5(\ctx)
83 sw $s6, OFFSET_S6(\ctx)
84 sw $s7, OFFSET_S7(\ctx)
85 sw $s8, OFFSET_S8(\ctx)
86 sw $gp, OFFSET_GP(\ctx)
87
88#ifndef KERNEL
89 sw $k1, OFFSET_TLS(\ctx)
90
[6da1013f]91#ifdef CONFIG_FPU
[c0699467]92 mfc1 $t0, $20
[308cdd1]93 sw $t0, OFFSET_F20(\ctx)
[c0699467]94
95 mfc1 $t0, $21
[308cdd1]96 sw $t0, OFFSET_F21(\ctx)
[c0699467]97
98 mfc1 $t0, $22
[308cdd1]99 sw $t0, OFFSET_F22(\ctx)
[c0699467]100
101 mfc1 $t0, $23
[308cdd1]102 sw $t0, OFFSET_F23(\ctx)
[c0699467]103
104 mfc1 $t0, $24
[308cdd1]105 sw $t0, OFFSET_F24(\ctx)
[c0699467]106
107 mfc1 $t0, $25
[308cdd1]108 sw $t0, OFFSET_F25(\ctx)
[c0699467]109
110 mfc1 $t0, $26
[308cdd1]111 sw $t0, OFFSET_F26(\ctx)
[c0699467]112
113 mfc1 $t0, $27
[308cdd1]114 sw $t0, OFFSET_F27(\ctx)
[c0699467]115
116 mfc1 $t0, $28
[308cdd1]117 sw $t0, OFFSET_F28(\ctx)
[c0699467]118
119 mfc1 $t0, $29
[308cdd1]120 sw $t0, OFFSET_F29(\ctx)
121
[c0699467]122 mfc1 $t0, $30
[308cdd1]123 sw $t0, OFFSET_F30(\ctx)
[6da1013f]124#endif /* CONFIG_FPU */
[308cdd1]125#endif /* KERNEL */
[c0699467]126
127 sw $ra, OFFSET_PC(\ctx)
128 sw $sp, OFFSET_SP(\ctx)
[308cdd1]129.endm
130
[c0699467]131/* ctx: address of the structure with saved context */
[308cdd1]132.macro CONTEXT_RESTORE_ARCH_CORE ctx:req
[c0699467]133 lw $s0, OFFSET_S0(\ctx)
134 lw $s1, OFFSET_S1(\ctx)
135 lw $s2, OFFSET_S2(\ctx)
136 lw $s3, OFFSET_S3(\ctx)
137 lw $s4, OFFSET_S4(\ctx)
138 lw $s5, OFFSET_S5(\ctx)
139 lw $s6, OFFSET_S6(\ctx)
140 lw $s7, OFFSET_S7(\ctx)
141 lw $s8, OFFSET_S8(\ctx)
142 lw $gp, OFFSET_GP(\ctx)
[308cdd1]143#ifndef KERNEL
[c0699467]144 lw $k1, OFFSET_TLS(\ctx)
145
[6da1013f]146#ifdef CONFIG_FPU
[308cdd1]147 lw $t0, OFFSET_F20(\ctx)
[c0699467]148 mtc1 $t0, $20
149
[308cdd1]150 lw $t0, OFFSET_F21(\ctx)
[c0699467]151 mtc1 $t0, $21
152
[308cdd1]153 lw $t0, OFFSET_F22(\ctx)
[c0699467]154 mtc1 $t0, $22
155
[308cdd1]156 lw $t0, OFFSET_F23(\ctx)
[c0699467]157 mtc1 $t0, $23
158
[308cdd1]159 lw $t0, OFFSET_F24(\ctx)
[c0699467]160 mtc1 $t0, $24
161
[308cdd1]162 lw $t0, OFFSET_F25(\ctx)
[c0699467]163 mtc1 $t0, $25
164
[308cdd1]165 lw $t0, OFFSET_F26(\ctx)
[c0699467]166 mtc1 $t0, $26
167
[308cdd1]168 lw $t0, OFFSET_F27(\ctx)
[c0699467]169 mtc1 $t0, $27
170
[308cdd1]171 lw $t0, OFFSET_F28(\ctx)
[c0699467]172 mtc1 $t0, $28
173
[308cdd1]174 lw $t0, OFFSET_F29(\ctx)
[c0699467]175 mtc1 $t0, $29
176
[308cdd1]177 lw $t0, OFFSET_F30(\ctx)
[c0699467]178 mtc1 $t0, $30
[6da1013f]179#endif /* CONFIG_FPU */
[308cdd1]180#endif /* KERNEL */
[c0699467]181
182 lw $ra, OFFSET_PC(\ctx)
183 lw $sp, OFFSET_SP(\ctx)
[308cdd1]184.endm
185
[c0699467]186#endif /* __ASM__ */
[308cdd1]187
[78595d6]188#endif
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