[78595d6] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2005 Martin Decky
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[78595d6] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | #ifndef KERN_mips32_CONTEXT_OFFSET_H_
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| 30 | #define KERN_mips32_CONTEXT_OFFSET_H_
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| 31 |
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[6f8a426] | 32 | #define OFFSET_SP 0x0
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| 33 | #define OFFSET_PC 0x4
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| 34 | #define OFFSET_S0 0x8
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| 35 | #define OFFSET_S1 0xc
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| 36 | #define OFFSET_S2 0x10
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| 37 | #define OFFSET_S3 0x14
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| 38 | #define OFFSET_S4 0x18
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| 39 | #define OFFSET_S5 0x1c
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| 40 | #define OFFSET_S6 0x20
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| 41 | #define OFFSET_S7 0x24
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| 42 | #define OFFSET_S8 0x28
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| 43 | #define OFFSET_GP 0x2c
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[389f41e] | 44 |
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[308cdd1] | 45 | #ifdef KERNEL
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| 46 | # define OFFSET_IPL 0x30
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| 47 | #else
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| 48 | # define OFFSET_TLS 0x30
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| 49 |
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| 50 | # define OFFSET_F20 0x34
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| 51 | # define OFFSET_F21 0x38
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| 52 | # define OFFSET_F22 0x3c
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| 53 | # define OFFSET_F23 0x40
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| 54 | # define OFFSET_F24 0x44
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| 55 | # define OFFSET_F25 0x48
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| 56 | # define OFFSET_F26 0x4c
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| 57 | # define OFFSET_F27 0x50
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| 58 | # define OFFSET_F28 0x54
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| 59 | # define OFFSET_F29 0x58
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| 60 | # define OFFSET_F30 0x5c
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| 61 | #endif /* KERNEL */
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| 62 |
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[b3f8fb7] | 63 | /* istate_t */
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[6f8a426] | 64 | #define EOFFSET_AT 0x0
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| 65 | #define EOFFSET_V0 0x4
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| 66 | #define EOFFSET_V1 0x8
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| 67 | #define EOFFSET_A0 0xc
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| 68 | #define EOFFSET_A1 0x10
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| 69 | #define EOFFSET_A2 0x14
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| 70 | #define EOFFSET_A3 0x18
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| 71 | #define EOFFSET_T0 0x1c
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| 72 | #define EOFFSET_T1 0x20
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| 73 | #define EOFFSET_T2 0x24
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| 74 | #define EOFFSET_T3 0x28
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| 75 | #define EOFFSET_T4 0x2c
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| 76 | #define EOFFSET_T5 0x30
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| 77 | #define EOFFSET_T6 0x34
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| 78 | #define EOFFSET_T7 0x38
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[1f7cb3a] | 79 | #define EOFFSET_T8 0x3c
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| 80 | #define EOFFSET_T9 0x40
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| 81 | #define EOFFSET_GP 0x44
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| 82 | #define EOFFSET_SP 0x48
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| 83 | #define EOFFSET_RA 0x4c
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| 84 | #define EOFFSET_LO 0x50
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| 85 | #define EOFFSET_HI 0x54
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| 86 | #define EOFFSET_STATUS 0x58
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| 87 | #define EOFFSET_EPC 0x5c
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| 88 | #define EOFFSET_K1 0x60
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| 89 | #define REGISTER_SPACE 100
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[78595d6] | 90 |
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[308cdd1] | 91 | #ifdef __ASM__
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| 92 |
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| 93 | #include <arch/asm/regname.h>
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| 94 |
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| 95 | # ctx: address of the structure with saved context
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| 96 | .macro CONTEXT_SAVE_ARCH_CORE ctx:req
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| 97 | sw $s0,OFFSET_S0(\ctx)
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| 98 | sw $s1,OFFSET_S1(\ctx)
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| 99 | sw $s2,OFFSET_S2(\ctx)
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| 100 | sw $s3,OFFSET_S3(\ctx)
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| 101 | sw $s4,OFFSET_S4(\ctx)
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| 102 | sw $s5,OFFSET_S5(\ctx)
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| 103 | sw $s6,OFFSET_S6(\ctx)
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| 104 | sw $s7,OFFSET_S7(\ctx)
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| 105 | sw $s8,OFFSET_S8(\ctx)
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| 106 | sw $gp,OFFSET_GP(\ctx)
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| 107 |
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[6da1013f] | 108 | #ifndef KERNEL
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[308cdd1] | 109 | sw $k1,OFFSET_TLS(\ctx)
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| 110 |
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[6da1013f] | 111 | #ifdef CONFIG_FPU
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[308cdd1] | 112 | mfc1 $t0,$20
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| 113 | sw $t0, OFFSET_F20(\ctx)
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| 114 |
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| 115 | mfc1 $t0,$21
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| 116 | sw $t0, OFFSET_F21(\ctx)
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| 117 |
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| 118 | mfc1 $t0,$22
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| 119 | sw $t0, OFFSET_F22(\ctx)
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| 120 |
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| 121 | mfc1 $t0,$23
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| 122 | sw $t0, OFFSET_F23(\ctx)
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| 123 |
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| 124 | mfc1 $t0,$24
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| 125 | sw $t0, OFFSET_F24(\ctx)
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| 126 |
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| 127 | mfc1 $t0,$25
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| 128 | sw $t0, OFFSET_F25(\ctx)
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| 129 |
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| 130 | mfc1 $t0,$26
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| 131 | sw $t0, OFFSET_F26(\ctx)
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| 132 |
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| 133 | mfc1 $t0,$27
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| 134 | sw $t0, OFFSET_F27(\ctx)
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| 135 |
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| 136 | mfc1 $t0,$28
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| 137 | sw $t0, OFFSET_F28(\ctx)
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| 138 |
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| 139 | mfc1 $t0,$29
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| 140 | sw $t0, OFFSET_F29(\ctx)
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| 141 |
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| 142 | mfc1 $t0,$30
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| 143 | sw $t0, OFFSET_F30(\ctx)
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[6da1013f] | 144 | #endif /* CONFIG_FPU */
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[308cdd1] | 145 | #endif /* KERNEL */
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| 146 |
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| 147 | sw $ra,OFFSET_PC(\ctx)
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| 148 | sw $sp,OFFSET_SP(\ctx)
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| 149 | .endm
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| 150 |
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| 151 | # ctx: address of the structure with saved context
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| 152 | .macro CONTEXT_RESTORE_ARCH_CORE ctx:req
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| 153 | lw $s0,OFFSET_S0(\ctx)
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| 154 | lw $s1,OFFSET_S1(\ctx)
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| 155 | lw $s2,OFFSET_S2(\ctx)
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| 156 | lw $s3,OFFSET_S3(\ctx)
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| 157 | lw $s4,OFFSET_S4(\ctx)
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| 158 | lw $s5,OFFSET_S5(\ctx)
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| 159 | lw $s6,OFFSET_S6(\ctx)
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| 160 | lw $s7,OFFSET_S7(\ctx)
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| 161 | lw $s8,OFFSET_S8(\ctx)
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| 162 | lw $gp,OFFSET_GP(\ctx)
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| 163 | #ifndef KERNEL
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| 164 | lw $k1,OFFSET_TLS(\ctx)
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| 165 |
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[6da1013f] | 166 | #ifdef CONFIG_FPU
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[308cdd1] | 167 | lw $t0, OFFSET_F20(\ctx)
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| 168 | mtc1 $t0,$20
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| 169 |
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| 170 | lw $t0, OFFSET_F21(\ctx)
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| 171 | mtc1 $t0,$21
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| 172 |
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| 173 | lw $t0, OFFSET_F22(\ctx)
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| 174 | mtc1 $t0,$22
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| 175 |
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| 176 | lw $t0, OFFSET_F23(\ctx)
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| 177 | mtc1 $t0,$23
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| 178 |
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| 179 | lw $t0, OFFSET_F24(\ctx)
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| 180 | mtc1 $t0,$24
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| 181 |
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| 182 | lw $t0, OFFSET_F25(\ctx)
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| 183 | mtc1 $t0,$25
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| 184 |
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| 185 | lw $t0, OFFSET_F26(\ctx)
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| 186 | mtc1 $t0,$26
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| 187 |
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| 188 | lw $t0, OFFSET_F27(\ctx)
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| 189 | mtc1 $t0,$27
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| 190 |
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| 191 | lw $t0, OFFSET_F28(\ctx)
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| 192 | mtc1 $t0,$28
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| 193 |
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| 194 | lw $t0, OFFSET_F29(\ctx)
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| 195 | mtc1 $t0,$29
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| 196 |
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| 197 | lw $t0, OFFSET_F30(\ctx)
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| 198 | mtc1 $t0,$30
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[6da1013f] | 199 | #endif /* CONFIG_FPU */
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[308cdd1] | 200 | #endif /* KERNEL */
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[6da1013f] | 201 |
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[308cdd1] | 202 | lw $ra,OFFSET_PC(\ctx)
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| 203 | lw $sp,OFFSET_SP(\ctx)
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| 204 | .endm
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| 205 |
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| 206 | #endif
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| 207 |
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| 208 |
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[78595d6] | 209 | #endif
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