| [f761f1eb] | 1 | /*
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| [178ec7b] | 2 | * Copyright (C) 2003-2004 Jakub Jermar
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| [f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| [2f40fe4] | 29 | /** @addtogroup mips32
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| [b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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| [60780c5] | 35 | #ifndef __mips32_ASM_H__
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| 36 | #define __mips32_ASM_H__
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| [f761f1eb] | 37 |
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| [361635c] | 38 | #include <arch/types.h>
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| [2bd4fdf] | 39 | #include <typedefs.h>
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| [361635c] | 40 | #include <config.h>
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| 41 |
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| [ffc277e] | 42 |
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| 43 | static inline void cpu_sleep(void)
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| 44 | {
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| 45 | /* Most of the simulators do not support */
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| 46 | /* __asm__ volatile ("wait"); */
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| 47 | }
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| [f761f1eb] | 48 |
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| [361635c] | 49 | /** Return base address of current stack
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| 50 | *
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| 51 | * Return the base address of the current stack.
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| 52 | * The stack is assumed to be STACK_SIZE bytes long.
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| [1fbbcd6] | 53 | * The stack must start on page boundary.
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| [361635c] | 54 | */
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| [7f1c620] | 55 | static inline uintptr_t get_stack_base(void)
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| [361635c] | 56 | {
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| [7f1c620] | 57 | uintptr_t v;
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| [361635c] | 58 |
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| 59 | __asm__ volatile ("and %0, $29, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
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| 60 |
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| 61 | return v;
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| 62 | }
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| 63 |
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| [2bd4fdf] | 64 | extern void cpu_halt(void);
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| [7f1c620] | 65 | extern void asm_delay_loop(uint32_t t);
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| 66 | extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg,
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| 67 | uintptr_t entry);
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| [9c0a9b3] | 68 |
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| [9a5b556] | 69 | extern ipl_t interrupts_disable(void);
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| 70 | extern ipl_t interrupts_enable(void);
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| 71 | extern void interrupts_restore(ipl_t ipl);
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| 72 | extern ipl_t interrupts_read(void);
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| 73 |
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| [f761f1eb] | 74 | #endif
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| [b45c443] | 75 |
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| [2f40fe4] | 76 | /** @}
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| [b45c443] | 77 | */
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