[f761f1eb] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2003-2004 Jakub Jermar
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[f761f1eb] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[2f40fe4] | 29 | /** @addtogroup mips32
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[06e1e95] | 35 | #ifndef KERN_mips32_ASM_H_
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| 36 | #define KERN_mips32_ASM_H_
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[f761f1eb] | 37 |
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[361635c] | 38 | #include <arch/types.h>
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| 39 | #include <config.h>
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| 40 |
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[ffc277e] | 41 |
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| 42 | static inline void cpu_sleep(void)
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| 43 | {
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| 44 | /* Most of the simulators do not support */
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[e7b7be3f] | 45 | /* asm volatile ("wait"); */
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[ffc277e] | 46 | }
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[f761f1eb] | 47 |
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[361635c] | 48 | /** Return base address of current stack
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| 49 | *
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| 50 | * Return the base address of the current stack.
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| 51 | * The stack is assumed to be STACK_SIZE bytes long.
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[1fbbcd6] | 52 | * The stack must start on page boundary.
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[361635c] | 53 | */
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[7f1c620] | 54 | static inline uintptr_t get_stack_base(void)
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[361635c] | 55 | {
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[7f1c620] | 56 | uintptr_t v;
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[361635c] | 57 |
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[7f341820] | 58 | asm volatile (
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| 59 | "and %0, $29, %1\n"
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| 60 | : "=r" (v)
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| 61 | : "r" (~(STACK_SIZE-1))
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| 62 | );
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[361635c] | 63 |
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| 64 | return v;
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| 65 | }
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| 66 |
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[2bd4fdf] | 67 | extern void cpu_halt(void);
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[7f1c620] | 68 | extern void asm_delay_loop(uint32_t t);
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| 69 | extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg,
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[7f341820] | 70 | uintptr_t entry);
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[9c0a9b3] | 71 |
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[9a5b556] | 72 | extern ipl_t interrupts_disable(void);
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| 73 | extern ipl_t interrupts_enable(void);
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| 74 | extern void interrupts_restore(ipl_t ipl);
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| 75 | extern ipl_t interrupts_read(void);
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[7f341820] | 76 | extern void asm_delay_loop(uint32_t t);
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[9a5b556] | 77 |
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[7d60cf5] | 78 | static inline void pio_write_8(ioport8_t *port, uint8_t v)
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[6da1013f] | 79 | {
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[ee06f2a] | 80 | /* XXX */
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[6da1013f] | 81 | }
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| 82 |
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[7d60cf5] | 83 | static inline uint8_t pio_read_8(ioport8_t *port)
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[6da1013f] | 84 | {
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[ee06f2a] | 85 | return 0; /* XXX */
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[6da1013f] | 86 | }
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| 87 |
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[f761f1eb] | 88 | #endif
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[b45c443] | 89 |
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[2f40fe4] | 90 | /** @}
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[b45c443] | 91 | */
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