source: mainline/kernel/arch/mips32/include/asm.h@ 5cb223f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 5cb223f was 7d60cf5, checked in by Jakub Jermar <jakub@…>, 16 years ago

Introduce ioport8_t, ioport16_t and ioport32_t. These types are to be used with
pio_read_n() and pio_write_n() functions. This breaks everything.

  • Property mode set to 100644
File size: 2.6 KB
RevLine 
[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2003-2004 Jakub Jermar
[f761f1eb]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[2f40fe4]29/** @addtogroup mips32
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[06e1e95]35#ifndef KERN_mips32_ASM_H_
36#define KERN_mips32_ASM_H_
[f761f1eb]37
[361635c]38#include <arch/types.h>
39#include <config.h>
40
[ffc277e]41
42static inline void cpu_sleep(void)
43{
44 /* Most of the simulators do not support */
[e7b7be3f]45/* asm volatile ("wait"); */
[ffc277e]46}
[f761f1eb]47
[361635c]48/** Return base address of current stack
49 *
50 * Return the base address of the current stack.
51 * The stack is assumed to be STACK_SIZE bytes long.
[1fbbcd6]52 * The stack must start on page boundary.
[361635c]53 */
[7f1c620]54static inline uintptr_t get_stack_base(void)
[361635c]55{
[7f1c620]56 uintptr_t v;
[361635c]57
[7f341820]58 asm volatile (
59 "and %0, $29, %1\n"
60 : "=r" (v)
61 : "r" (~(STACK_SIZE-1))
62 );
[361635c]63
64 return v;
65}
66
[2bd4fdf]67extern void cpu_halt(void);
[7f1c620]68extern void asm_delay_loop(uint32_t t);
69extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg,
[7f341820]70 uintptr_t entry);
[9c0a9b3]71
[9a5b556]72extern ipl_t interrupts_disable(void);
73extern ipl_t interrupts_enable(void);
74extern void interrupts_restore(ipl_t ipl);
75extern ipl_t interrupts_read(void);
[7f341820]76extern void asm_delay_loop(uint32_t t);
[9a5b556]77
[7d60cf5]78static inline void pio_write_8(ioport8_t *port, uint8_t v)
[6da1013f]79{
[ee06f2a]80 /* XXX */
[6da1013f]81}
82
[7d60cf5]83static inline uint8_t pio_read_8(ioport8_t *port)
[6da1013f]84{
[ee06f2a]85 return 0; /* XXX */
[6da1013f]86}
87
[f761f1eb]88#endif
[b45c443]89
[2f40fe4]90/** @}
[b45c443]91 */
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