| 1 | /*
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| 2 | * Copyright (c) 2003-2004 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup kernel_mips32
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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| 35 | #ifndef KERN_mips32_ASM_H_
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| 36 | #define KERN_mips32_ASM_H_
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| 37 |
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| 38 | #include <typedefs.h>
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| 39 | #include <config.h>
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| 40 | #include <trace.h>
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| 41 |
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| 42 | _NO_TRACE static inline void cpu_sleep(void)
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| 43 | {
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| 44 | asm volatile ("wait");
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| 45 | }
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| 46 |
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| 47 | _NO_TRACE static inline void cpu_spin_hint(void)
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| 48 | {
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| 49 | }
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| 50 |
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| 51 | _NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v)
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| 52 | {
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| 53 | *port = v;
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| 54 | }
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| 55 |
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| 56 | _NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v)
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| 57 | {
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| 58 | *port = v;
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| 59 | }
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| 60 |
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| 61 | _NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v)
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| 62 | {
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| 63 | *port = v;
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| 64 | }
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| 65 |
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| 66 | _NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
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| 67 | {
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| 68 | return *port;
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| 69 | }
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| 70 |
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| 71 | _NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
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| 72 | {
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| 73 | return *port;
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| 74 | }
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| 75 |
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| 76 | _NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
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| 77 | {
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| 78 | return *port;
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| 79 | }
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| 80 |
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| 81 | extern void cpu_halt(void) __attribute__((noreturn));
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| 82 | extern void asm_delay_loop(uint32_t);
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| 83 | extern void userspace_asm(uintptr_t, uintptr_t, uintptr_t);
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| 84 |
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| 85 | extern ipl_t interrupts_disable(void);
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| 86 | extern ipl_t interrupts_enable(void);
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| 87 | extern void interrupts_restore(ipl_t);
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| 88 | extern ipl_t interrupts_read(void);
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| 89 | extern bool interrupts_disabled(void);
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| 90 |
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| 91 | /** Enables interrupts and blocks until an interrupt arrives,
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| 92 | * atomically if possible on target architecture.
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| 93 | * Disables interrupts again before returning to caller.
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| 94 | */
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| 95 | _NO_TRACE static inline void cpu_interruptible_sleep(void)
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| 96 | {
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| 97 | // FIXME: do this atomically
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| 98 | interrupts_enable();
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| 99 | cpu_sleep();
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| 100 | interrupts_disable();
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| 101 | }
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| 102 |
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| 103 | #endif
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| 104 |
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| 105 | /** @}
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| 106 | */
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