source: mainline/kernel/arch/mips32/Makefile.inc@ b6e97d7

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since b6e97d7 was d7e3f1ad, checked in by Jakub Jermar <jakub@…>, 19 years ago

Replace FB_BIG_ENDIAN with FB_INVERT_ENDIAN.
Omit tests for architecture endianness in deciding framebuffer endianness.

  • Property mode set to 100644
File size: 3.8 KB
Line 
1#
2# Copyright (C) 2005 Martin Decky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29## Toolchain configuration
30#
31
32BFD_ARCH = mips
33TARGET = mipsel-linux-gnu
34TOOLCHAIN_DIR = /usr/local/mipsel/bin
35
36KERNEL_LOAD_ADDRESS = 0x80100000
37INIT_ADDRESS = 0x81000000
38INIT_SIZE = 262144
39
40CFLAGS += -mno-abicalls -G 0 -fno-zero-initialized-in-bss
41
42DEFS += -D__32_BITS__ -DMACHINE=$(MACHINE) -DKERNEL_LOAD_ADDRESS=${KERNEL_LOAD_ADDRESS} -DINIT_ADDRESS=${INIT_ADDRESS} -DINIT_SIZE=${INIT_SIZE}
43
44## Compile with hierarchical page tables support.
45#
46
47CONFIG_PAGE_PT = y
48DEFS += -DCONFIG_PAGE_PT
49
50## Compile with support for address space identifiers.
51#
52
53CONFIG_ASID = y
54CONFIG_ASID_FIFO = y
55
56## Accepted MACHINEs
57#
58
59ifeq ($(MACHINE),indy)
60 # GCC 4.0.1 compiled for mipsEL has problems compiling in
61 # BigEndian mode with the swl/swr/lwl/lwr instructions.
62 # We have to compile it with mips-sgi-irix5 to get it right.
63
64 BFD_NAME = elf32-bigmips
65 BFD = ecoff-bigmips --impure
66 TARGET = mips-sgi-irix5
67 TOOLCHAIN_DIR = /usr/local/mips/bin
68 KERNEL_LOAD_ADDRESS = 0x88002000
69 CFLAGS += -EB -DBIG_ENDIAN -DARCH_HAS_FPU -march=r4600
70 INIT_ADDRESS = 0
71 INIT_SIZE = 0
72endif
73ifeq ($(MACHINE),lgxemul)
74 BFD_NAME = elf32-tradlittlemips
75 BFD = binary
76 CFLAGS += -DFB_INVERT_ENDIAN -DARCH_HAS_FPU -mips3
77endif
78ifeq ($(MACHINE),bgxemul)
79 BFD_NAME = elf32-bigmips
80 BFD = ecoff-bigmips
81 TARGET = mips-sgi-irix5
82 TOOLCHAIN_DIR = /usr/local/mips/bin
83 CFLAGS += -EB -DBIG_ENDIAN -DARCH_HAS_FPU -mips3
84 INIT_ADDRESS = 0x81800000
85endif
86ifeq ($(MACHINE),simics)
87 # SIMICS 4kc emulation is broken, although for instructions
88 # that do not bother us
89
90 BFD_NAME = elf32-tradlittlemips
91 BFD = elf32-tradlittlemips
92 CFLAGS += -mhard-float -mips3 -DTLBCNT=16
93 TLBCNT = 16
94endif
95ifeq ($(MACHINE),msim)
96 BFD_NAME = elf32-tradlittlemips
97 BFD = binary
98 CFLAGS += -mhard-float -mips3
99endif
100
101## Compile with support for software integer division.
102#
103
104CONFIG_SOFTINT = y
105
106
107ARCH_SOURCES = \
108 arch/$(ARCH)/src/start.S \
109 arch/$(ARCH)/src/context.S \
110 arch/$(ARCH)/src/panic.S \
111 arch/$(ARCH)/src/mips32.c \
112 arch/$(ARCH)/src/dummy.S \
113 arch/$(ARCH)/src/console.c \
114 arch/$(ARCH)/src/asm.S \
115 arch/$(ARCH)/src/exception.c \
116 arch/$(ARCH)/src/interrupt.c \
117 arch/$(ARCH)/src/cache.c \
118 arch/$(ARCH)/src/debugger.c \
119 arch/$(ARCH)/src/cpu/cpu.c \
120 arch/$(ARCH)/src/mm/frame.c \
121 arch/$(ARCH)/src/mm/page.c \
122 arch/$(ARCH)/src/mm/tlb.c \
123 arch/$(ARCH)/src/mm/as.c \
124 arch/$(ARCH)/src/fpu_context.c \
125 arch/$(ARCH)/src/ddi/ddi.c \
126 arch/$(ARCH)/src/drivers/arc.c \
127 arch/$(ARCH)/src/drivers/msim.c \
128 arch/$(ARCH)/src/drivers/serial.c
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