[30ef8ce] | 1 | #
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[df4ed85] | 2 | # Copyright (c) 2005 Jakub Jermar
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[30ef8ce] | 3 | # All rights reserved.
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| 4 | #
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| 5 | # Redistribution and use in source and binary forms, with or without
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| 6 | # modification, are permitted provided that the following conditions
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| 7 | # are met:
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| 8 | #
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| 9 | # - Redistributions of source code must retain the above copyright
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| 10 | # notice, this list of conditions and the following disclaimer.
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| 11 | # - Redistributions in binary form must reproduce the above copyright
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| 12 | # notice, this list of conditions and the following disclaimer in the
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| 13 | # documentation and/or other materials provided with the distribution.
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| 14 | # - The name of the author may not be used to endorse or promote products
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| 15 | # derived from this software without specific prior written permission.
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| 16 | #
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| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | #
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| 28 |
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[27f67f5] | 29 | #include <abi/asmtool.h>
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[802bb95] | 30 | #include <arch/register.h>
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[5ac2e61] | 31 | #include <arch/mm/page.h>
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| 32 | #include <arch/mm/asid.h>
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| 33 | #include <mm/asid.h>
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| 34 |
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[5bda2f3e] | 35 | #define RR_MASK (0xFFFFFFFF00000002)
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| 36 | #define RID_SHIFT 8
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| 37 | #define PS_SHIFT 2
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[7208b6c] | 38 |
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[5bda2f3e] | 39 | #define KERNEL_TRANSLATION_I 0x0010000000000661
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| 40 | #define KERNEL_TRANSLATION_D 0x0010000000000661
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[5ac2e61] | 41 |
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[9faddb3] | 42 | .section K_TEXT_START, "ax"
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[00a44bc] | 43 |
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[2217ac3] | 44 | stack0:
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[fe7abd0] | 45 |
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| 46 | #
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| 47 | # Kernel entry point.
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| 48 | #
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| 49 | # This is where we are passed control from the boot code.
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| 50 | # Register contents:
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| 51 | #
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| 52 | # r2 Address of the boot code's bootinfo structure.
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| 53 | #
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[27f67f5] | 54 | SYMBOL(kernel_image_start)
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[7f1bfce] | 55 | .auto
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[a35b458] | 56 |
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[7208b6c] | 57 | mov psr.l = r0
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| 58 | srlz.i
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| 59 | srlz.d
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[a35b458] | 60 |
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[481c520] | 61 | # Fill TR.i and TR.d using Region Register #VRN_KERNEL
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[a35b458] | 62 |
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[15819e37] | 63 | movl r8 = (VRN_KERNEL << VRN_SHIFT)
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| 64 | mov r9 = rr[r8]
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[a35b458] | 65 |
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[15819e37] | 66 | movl r10 = (RR_MASK)
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| 67 | and r9 = r10, r9
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[d9ee2ea] | 68 | movl r10 = (((RID_KERNEL7) << RID_SHIFT) | (KERNEL_PAGE_WIDTH << PS_SHIFT))
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[5bda2f3e] | 69 | or r9 = r10, r9
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[a35b458] | 70 |
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[15819e37] | 71 | mov rr[r8] = r9
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[a35b458] | 72 |
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[15819e37] | 73 | movl r8 = (VRN_KERNEL << VRN_SHIFT)
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| 74 | mov cr.ifa = r8
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[a35b458] | 75 |
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[acee917] | 76 | mov r11 = cr.itir
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| 77 | movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT)
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| 78 | or r10 = r10, r11
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| 79 | mov cr.itir = r10
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[a35b458] | 80 |
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[15819e37] | 81 | movl r10 = (KERNEL_TRANSLATION_I)
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| 82 | itr.i itr[r0] = r10
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| 83 | movl r10 = (KERNEL_TRANSLATION_D)
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| 84 | itr.d dtr[r0] = r10
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[a35b458] | 85 |
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[22f0561] | 86 | # Initialize DCR
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[a35b458] | 87 |
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[b13d80b] | 88 | movl r10 = (DCR_DM_MASK | DCR_DP_MASK | DCR_DK_MASK | DCR_DX_MASK | DCR_DR_MASK | DCR_DA_MASK | DCR_DD_MASK | DCR_LC_MASK)
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[93d66ef] | 89 | mov r9 = cr.dcr
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| 90 | or r10 = r10, r9
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| 91 | mov cr.dcr = r10
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[a35b458] | 92 |
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[666773c] | 93 | # Initialize PSR
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[a35b458] | 94 |
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[15819e37] | 95 | movl r10 = (PSR_DT_MASK | PSR_RT_MASK | PSR_IT_MASK | PSR_IC_MASK) /* Enable paging */
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| 96 | mov r9 = psr
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[a35b458] | 97 |
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[15819e37] | 98 | or r10 = r10, r9
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| 99 | mov cr.ipsr = r10
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| 100 | mov cr.ifs = r0
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| 101 | movl r8 = paging_start
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| 102 | mov cr.iip = r8
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[802bb95] | 103 | srlz.d
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[5ac2e61] | 104 | srlz.i
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[a35b458] | 105 |
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[481c520] | 106 | .explicit
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[a35b458] | 107 |
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[481c520] | 108 | /*
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[0e56eb1a] | 109 | * Return From Interrupt is the only way to
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| 110 | * fill the upper half word of PSR.
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[481c520] | 111 | */
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[acee917] | 112 | rfi ;;
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[085434a] | 113 |
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| 114 | paging_start:
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[a35b458] | 115 |
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[481c520] | 116 | /*
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| 117 | * Now we are paging.
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| 118 | */
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[d75628da] | 119 |
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| 120 | #
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| 121 | # Set Interruption Vector Address
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| 122 | # (i.e. location of interruption vector table)
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| 123 | #
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[1b20da0] | 124 | movl r8 = ivt ;;
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[d75628da] | 125 | mov cr.iva = r8
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[1b20da0] | 126 | srlz.d ;;
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[d75628da] | 127 |
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[a35b458] | 128 |
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[666773c] | 129 | # Switch to register bank 1
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[802bb95] | 130 | bsw.1
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[a35b458] | 131 |
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[666773c] | 132 | # Initialize register stack
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[7f1bfce] | 133 | mov ar.rsc = r0
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[15819e37] | 134 | movl r8 = (VRN_KERNEL << VRN_SHIFT) ;;
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[5ac2e61] | 135 | mov ar.bspstore = r8
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[7f1bfce] | 136 | loadrs
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[a35b458] | 137 |
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[7f0e7b6] | 138 | #
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[d75628da] | 139 | # Initialize memory stack to some sane value and allocate a scratch area
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[7f0e7b6] | 140 | # on it.
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| 141 | #
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| 142 | movl sp = stack0 ;;
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| 143 | add sp = -16, sp
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[a35b458] | 144 |
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[666773c] | 145 | # Initialize gp (Global Pointer) register
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[18ba2e4f] | 146 | movl gp = __gp
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[a35b458] | 147 |
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[18ba2e4f] | 148 | #
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[fe7abd0] | 149 | # Initialize bootinfo on BSP.
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| 150 | #
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| 151 | movl r20 = (VRN_KERNEL << VRN_SHIFT) ;;
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| 152 | or r20 = r20, r2 ;;
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[e5c1186] | 153 | addl r21 = @gprel(bootinfo), gp ;;
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| 154 | st8 [r21] = r20
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[a35b458] | 155 |
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[15819e37] | 156 | ssm (1 << 19) ;; /* Disable f32 - f127 */
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| 157 | srlz.i
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| 158 | srlz.d ;;
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[a35b458] | 159 |
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[36df4109] | 160 | br.call.sptk.many b0 = ia64_pre_main
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[fae1647] | 161 | 0:
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| 162 | br.call.sptk.many b0 = main_bsp
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[2a0047fc] | 163 | 0:
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[47d78c6] | 164 | br 0b
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