source: mainline/kernel/arch/ia64/src/proc/scheduler.c@ 06e1e95

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 06e1e95 was 06e1e95, checked in by Jakub Jermar <jakub@…>, 19 years ago

C99 compliant header guards (hopefully) everywhere in the kernel.
Formatting and indentation changes.
Small improvements in sparc64.

  • Property mode set to 100644
File size: 3.0 KB
RevLine 
[a0d74fd]1/*
2 * Copyright (C) 2006 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup ia64proc
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[a0d74fd]35#include <proc/scheduler.h>
36#include <proc/thread.h>
37#include <arch.h>
[bc314be8]38#include <arch/register.h>
[83d2d0e]39#include <arch/context.h>
[cd373bb]40#include <arch/stack.h>
[a0d74fd]41#include <arch/mm/tlb.h>
42#include <config.h>
43#include <align.h>
44
[39cea6a]45/** Perform ia64 specific tasks needed before the new task is run. */
46void before_task_runs_arch(void)
47{
48}
49
[cd373bb]50/** Prepare kernel stack pointers in bank 0 r22 and r23 and make sure the stack is mapped in DTR. */
[a0d74fd]51void before_thread_runs_arch(void)
52{
[7f1c620]53 uintptr_t base;
[a0d74fd]54
55 base = ALIGN_DOWN(config.base, 1<<KERNEL_PAGE_WIDTH);
56
[7f1c620]57 if ((uintptr_t) THREAD->kstack < base || (uintptr_t) THREAD->kstack > base + (1<<(KERNEL_PAGE_WIDTH))) {
[a0d74fd]58 /*
[03427d0]59 * Kernel stack of this thread is not mapped by DTR[TR_KERNEL].
[b6d4566]60 * Use DTR[TR_KSTACK1] and DTR[TR_KSTACK2] to map it.
[a0d74fd]61 */
[208259c]62
63 /* purge DTR[TR_STACK1] and DTR[TR_STACK2] */
[7f1c620]64 dtr_purge((uintptr_t) THREAD->kstack, PAGE_WIDTH+1);
[208259c]65
66 /* insert DTR[TR_STACK1] and DTR[TR_STACK2] */
[7f1c620]67 dtlb_kernel_mapping_insert((uintptr_t) THREAD->kstack, KA2PA(THREAD->kstack), true, DTR_KSTACK1);
68 dtlb_kernel_mapping_insert((uintptr_t) THREAD->kstack + PAGE_SIZE, KA2PA(THREAD->kstack) + FRAME_SIZE, true, DTR_KSTACK2);
[a0d74fd]69 }
[03427d0]70
71 /*
[cd373bb]72 * Record address of kernel backing store to bank 0 r22.
73 * Record address of kernel stack to bank 0 r23.
74 * These values will be found there after switch from userspace.
[03427d0]75 */
[bc314be8]76 __asm__ volatile (
77 "bsw.0\n"
[cd373bb]78 "mov r22 = %0\n"
79 "mov r23 = %1\n"
[bc314be8]80 "bsw.1\n"
[cd373bb]81 :
[1065603e]82 : "r" (&THREAD->kstack[THREAD_STACK_SIZE]),
[a82500ce]83 "r" (&THREAD->kstack[THREAD_STACK_SIZE - SP_DELTA])
84 );
[a0d74fd]85}
86
87void after_thread_ran_arch(void)
88{
89}
[b45c443]90
[06e1e95]91/** @}
[b45c443]92 */
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