source: mainline/kernel/arch/ia64/src/mm/vhpt.c@ cc74cb5

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since cc74cb5 was 09ab0a9a, checked in by Jiri Svoboda <jiri@…>, 7 years ago

Fix vertical spacing with new Ccheck revision.

  • Property mode set to 100644
File size: 2.6 KB
RevLine 
[203dcd45]1/*
[ae7d03c]2 * Copyright (c) 2006 Jakub Vana
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
[b45c443]27 */
28
[5bda2f3e]29/** @addtogroup ia64mm
[b45c443]30 * @{
31 */
32/** @file
[ae7d03c]33 */
[203dcd45]34
[44a7ee5]35#include <mem.h>
[7328ff4]36#include <arch/barrier.h>
[68091bd]37#include <arch/mm/vhpt.h>
38#include <mm/frame.h>
39#include <print.h>
40
[1433ecda]41static vhpt_entry_t *vhpt_base;
[68091bd]42
[7f1c620]43uintptr_t vhpt_set_up(void)
[68091bd]44{
[cd3b380]45 uintptr_t vhpt_frame =
46 frame_alloc(SIZE2FRAMES(VHPT_SIZE), FRAME_ATOMIC, 0);
47 if (!vhpt_frame)
[7ee0e2f]48 panic("Kernel configured with VHPT but no memory for table.");
[a35b458]49
[cd3b380]50 vhpt_base = (vhpt_entry_t *) PA2KA(vhpt_frame);
[68091bd]51 vhpt_invalidate_all();
[7f1c620]52 return (uintptr_t) vhpt_base;
[68091bd]53}
54
[7f1c620]55void vhpt_mapping_insert(uintptr_t va, asid_t asid, tlb_entry_t entry)
[68091bd]56{
[5bda2f3e]57 region_register_t rr_save, rr;
[98000fb]58 size_t vrn;
[68091bd]59 rid_t rid;
[7f1c620]60 uint64_t tag;
[a35b458]61
[68091bd]62 vhpt_entry_t *ventry;
[a35b458]63
[68091bd]64 vrn = va >> VRN_SHIFT;
65 rid = ASID2RID(asid, vrn);
[a35b458]66
[b3f8fb7]67 rr_save.word = rr_read(vrn);
68 rr.word = rr_save.word;
69 rr.map.rid = rid;
70 rr_write(vrn, rr.word);
71 srlz_i();
[a35b458]72
[68091bd]73 ventry = (vhpt_entry_t *) thash(va);
[b3f8fb7]74 tag = ttag(va);
75 rr_write(vrn, rr_save.word);
76 srlz_i();
77 srlz_d();
[a35b458]78
[b3f8fb7]79 ventry->word[0] = entry.word[0];
80 ventry->word[1] = entry.word[1];
[68091bd]81 ventry->present.tag.tag_word = tag;
82}
83
[193d280c]84void vhpt_invalidate_all(void)
[68091bd]85{
[b0c2075]86 memsetb(vhpt_base, VHPT_SIZE, 0);
[68091bd]87}
88
89void vhpt_invalidate_asid(asid_t asid)
90{
91 vhpt_invalidate_all();
92}
93
[ee289cf0]94/** @}
[b45c443]95 */
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